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LTC3350 Datasheet(PDF) 10 Page - Linear Technology |
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LTC3350 Datasheet(HTML) 10 Page - Linear Technology |
10 / 46 page LTC3350 10 3350fb For more information www.linear.com/LTC3350 pin FuncTions SCL (Pin 1): Clock Pin for the I2C/SMBus Serial Port. SDA (Pin 2): Bidirectional Data Pin for the I2C/SMBus Serial Port. SMBALERT (Pin 3): Interrupt Output. This open-drain output is pulled low when an alarm threshold is exceeded, andwillremainlowuntiltheacknowledgementofthepart’s response to an SMBus ARA. CAPGD (Pin 4): Capacitor Power Good. This open-drain output is pulled low when CAPFB is below 92% of its regulation point. VC (PIN 5): Control Voltage Pin. This is the compensation node for the charge current, input current, supercapacitor stack voltage and output voltage control loops. An RC network is connected between VC and SGND. Nominal voltage range for this pin is 1V to 3V. CAPFB (Pin 6): Capacitor Stack Feedback Pin. This pin closes the feedback loop for constant voltage regulation. An external resistor divider between VCAP and SGND with the center tap connected to CAPFB programs the final supercapacitor stack voltage. This pin is nominally equal to the output of the VCAP DAC when the synchronous controller is in constant voltage mode while charging. OUTFB (Pin 7): Step-Up Mode Feedback Pin. This pin closes the feedback loop for voltage regulation of VOUT duringinputpowerfailureusingthesynchronouscontroller in step-up mode. An external resistor divider between VOUT and SGND with the center tap connected to OUTFB programs the minimum backup supply rail voltage when inputpowerisunavailable.Thispinisnominally1.2Vwhen in backup and the synchronous controller is not in current limit. To disable step-up mode tie OUTFB to INTVCC. SGND (Pin 8): Signal Ground. All small-signal and com- pensation components should be connected to this pin, which in turn connects to PGND at one point. This pin shouldalsoKelvintothebottomplateofthecapacitorstack. RT (Pin 9): Timing Resistor. The switching frequency of the synchronous controller is set by placing a resistor, RT, from this pin to SGND. This resistor is always required. If not present the synchronous controller will not start. GPI (Pin 10): General Purpose Input. The voltage on this pin is digitized directly by the ADC. For high impedance inputs an internal buffer can be selected and used to drive the ADC. The GPI pin can be connected to a negative temperature coefficient (NTC) thermistor to monitor the temperature of the supercapacitor stack. A low drift bias resistor is required from INTVCC to GPI and a thermistor is required from GPI to ground. Connect GPI to SGND if not used. The digitized voltage on this pin can be read in the meas_gpi register. ITST (Pin 11): Programming Pin for Capacitance Test Cur- rent. This current is used to partially discharge the capaci- tor stack at a precise rate for capacitance measurement. This pin servos to 1.2V during a capacitor measurement. A resistor, RTST, from this pin to SGND programs the test current. RTST must be at least 121Ω. CAPRTN (Pin 12): Capacitor Stack Shunt Return Pin. This pin is connected to the grounded bottom plate of the first super capacitor in the stack through a shunt resistor. CAP1 (Pin 13): First Supercapacitor Pin. The top plate of the first supercapacitor and the bottom plate of the second supercapacitor are connected to this pin through a shunt resistor.CAP1andCAPRTNareusedtomeasurethevoltage acrossthefirstsupercapacitorandtoshuntcurrentaround thecapacitortoprovidebalancingandpreventovervoltage. The voltage between this pin and CAPRTN is digitized and can be read in the meas_vcap1 register. CAP2 (Pin 14): Second Supercapacitor Pin. The top plate of the second supercapacitor and the bottom plate of the third supercapacitor are connected to this pin through a shunt resistor. CAP2 and CAP1 are used to measure the voltage across the second supercapacitor and to shunt |
Similar Part No. - LTC3350_15 |
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Similar Description - LTC3350_15 |
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