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NJG1707PG1-C11 Datasheet(PDF) 5 Page - New Japan Radio |
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NJG1707PG1-C11 Datasheet(HTML) 5 Page - New Japan Radio |
5 / 17 page NJG1707PG1 - 5 - nTERMINAL INFORMATION nTRUTH TABLE ”H”=VCTL (H), ”L”=VCTL (L), ”X”=H or L CONTROL INPUT CONTROL OUTPUT Tx/Rx Diversity IN/OUT ROUTE CTL1 CTL2 CTL3 SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 Tx-ANT1 H X H OFF OFF OFF ON ON OFF OFF OFF ON Tx-EXT1 H X L OFF OFF ON OFF ON ON ON OFF OFF Rx-ANT1 L L H OFF OFF ON OFF ON OFF ON ON ON Rx-ANT2 L H H ON OFF OFF OFF OFF ON ON ON ON Rx-EXT1 L L L OFF OFF OFF ON ON ON OFF ON OFF Rx-EXT2 L H L OFF ON OFF OFF ON ON ON ON ON PIN NO. SYMBOL DESCRIPTIONS 4 CTL1 5 CTL2 6 CTL3 Control signal input terminal of high impedance C-MOS logic. Logic level: High; more than +2V, Low; 0~+0.6V. Please connect to GND or VDD with 100k Ω if potential is open or uncertain. 7 VSS Negative supply terminal. Negative voltage of -3.5~-2.0V must be supplied on Tx mode. This terminal is isolated on Rx mode, so open or –2.5~0V condition can be used. Please connect bypass capacitor with GND to keep RF performance. 9 VDD Positive supply terminal. The voltage of this terminal should be supplied before or same time with other DC supplying terminals (CTL1~3, VSS). The bias voltage should be +2.7~+5.0V. Please connect bypass capacitor with GND to keep RF performance. 11 EXT2 RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. 13 EXT1 RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. 15 TX Tx power input terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). 17 TER2 A termination terminal for ANT1 in case ANT2 is in use. The influence of ANT1 against ANT2 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. 19 ANT1 RF port for Tx/Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. 21 RX Rx output terminal. A DC cut capacitor is required to block VDD voltage, and also an external matching circuit is required to improve VSWR(See Application circuit). 23 ANT2 RF port for Rx signal. A DC cut capacitor (56pF~100pF) is required to block VDD voltage. 25 TER1 A termination terminal for ANT2 in case ANT1 is in use. The influence of ANT2 against ANT1 is reduced. A DC cut capacitor (10pF) is required to block VDD voltage. 26,27 GND(LNA) Ground terminal of LNA. Please place ground plane close to this pin for good RF performance. 28 LNAIN LNA input terminal. An external matching circuit is required. 30 LNAOUT LNA output terminal. An external matching circuit with LNA biasing element L3, L4 as in application circuit is required. 31 EXTCAP Bypass capacitor terminal of LNA. Please place C9 as in application circuit close to this terminal. 1,2,3,8,10, 12,14,16,1 8,20,22,24, 29,32 GND Ground terminal. Please connect to ground plane as close as possible for good RF performance. |
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