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P4C1681-12FSM Datasheet(PDF) 4 Page - Pyramid Semiconductor Corporation

Part # P4C1681-12FSM
Description  ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
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Manufacturer  PYRAMID [Pyramid Semiconductor Corporation]
Direct Link  http://www.pyramidsemiconductor.com
Logo PYRAMID - Pyramid Semiconductor Corporation

P4C1681-12FSM Datasheet(HTML) 4 Page - Pyramid Semiconductor Corporation

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P4C1681, P4C1682
Page 4 of 10
Document # SRAM109 REV A
Notes:
5. WE is HIGH for READ cycle.
6. CE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with, CE
transition LOW.
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min
Max Min Max
t
RC
Read Cycle Time
12
15
20
25
35
ns
t
AA
Address Access
12
15
20
25
35
ns
Time
t
AC
Chip Enable
12
15
20
25
35
ns
Access Time
t
OH
Output Hold from
2
2
3
3
3
ns
Address Change
t
LZ
Chip Enable to
2
2
3
3
3
ns
Output in Low Z
t
HZ
Chip Disable to
6
7
9
10
15
ns
Output in High Z
t
RCS
ReadCommand
0
0
0
0
0
ns
Setup Time
t
RCH
ReadCommand
0
0
0
0
0
ns
Hold Time
t
PU
Chip Enable to
0
0
0
0
0
ns
Power Up Time
t
PD
Chip Disable to
12
15
20
25
25
ns
Power Down Time
READ CYCLE NO. 1 (ADDRESS controlled)(5, 6)
READ CYCLE NO. 2 (CE
CE
CE
CE
CE controlled)(5, 7)
8. Transition is measured ±200mV from steady state voltage prior to
change, with loading as specified in Figure 1.
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
Symbol
Parameter
Unit
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC = 5V ± 10%, All Temperature Ranges)
(2)
1552 Tbl 10


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