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P4C1257L55FI Datasheet(PDF) 3 Page - Pyramid Semiconductor Corporation |
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P4C1257L55FI Datasheet(HTML) 3 Page - Pyramid Semiconductor Corporation |
3 / 11 page P4C1257/P4C1257L - ULTRA HIGH SPEED 256K X 1 STATIC CMOS RAMS Page 3 Document # SRAM137 REV 01 Sym Parameter -12 -15 -20 -25 -35 -45 -55 -70 Unit Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max t RC Read Cycle Time 12 15 20 25 35 45 55 70 ns t AA Address Ac- cess Time 12 15 20 25 35 45 55 70 ns t AC Chip Enable Access Time 12 15 20 25 35 45 55 70 ns t OH Output Hold from Address Change 2 2 2 2 2 2 2 2 ns t LZ Chip Enable to Output in Low Z 2 2 2 2 2 2 2 2 ns t HZ Chip Disable to Output in High Z 6 8 10 12 17 20 25 30 ns t PU Chip Enable to Power Up Time 0 0 0 0 0 0 0 0 ns t PD Chip Disable to Power Down 12 15 20 25 35 45 55 70 ns AC ELECTRICAL CHARACTERISTICS—READ CYCLE (V CC = 5V ± 10%, All Temperature Ranges) (2) TIMIng WAVEFORM OF READ CYCLE nO. 1 (ADDRESS COnTROLLED)(5,6) DATA RETEnTIOn CHARACTERISTICS (P4C1257L) Sym Parameter Test Conditions Min Typ* V CC= Max V CC= Unit 2.0V 3.0V 2.0V 3.0V V DR V CC for Data Retention 2.0 V I CCDR Data Retention Current CE ≥ V CC -0.2V, V IN ≥ VCC -0.2V or V IN ≤ 0.2V 10 15 600 900 µA t CDR Chip Deselect to Data Retention Time 0 ns t R † Operation Recovery Time t RC § ns * T A = +25°C § t RC = Read Cycle Time † This Parameter is guaranteed but not tested |
Similar Part No. - P4C1257L55FI |
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Similar Description - P4C1257L55FI |
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