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P4C1299-45PM Datasheet(PDF) 5 Page - Pyramid Semiconductor Corporation |
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P4C1299-45PM Datasheet(HTML) 5 Page - Pyramid Semiconductor Corporation |
5 / 11 page P4C1299/P4C1299L - ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM Page 5 Document #SRAM144 REV OR AC CHARACTERISTICS—WRITE CYCLE (V CC = 5V ± 10%, All Temperature Ranges) (2) Sym Parameter -15 -20 -25 -35 -45 Unit Min Max Min Max Min Max Min Max Min Max t WC Write Cycle Time 10 12 15 20 25 ns t CW Chip Enable Time to End of Write 8 10 12 15 18 ns t AW Address Valid to End of Write 8 10 12 15 18 ns t AS Address Setup Time 0 0 0 0 0 ns t WP Write Pulse Width 8 10 12 15 18 ns t AH Address Hold Time 0 0 0 0 0 ns t DW Data Valid to End of Write 7 8 10 12 15 ns t DH Data Hold Time 0 0 0 0 0 ns t WZ Write Enable to Output in High Z 6 7 8 10 15 ns t OW Output Active from End of Write 0 0 0 0 0 ns TIMIng WAVEFORM OF WRITE CYCLE nO. 1 (WE COnTROLLED)(9) Notes: 10. CE 1,2 and WE must be LOW for WRITE cycle. 11. OE is LOW for this WRITE cycle to show t WZ and tOW. 12. If CE 1,2 goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state 13. Write Cycle Time is measured from the last valid address to the first transitioning address. |
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