400ksps/300ksps, Single-Supply, Low-Power,

Serial 10-Bit ADCs with Internal Reference

_______________________________________________________________________________________

5

TIMING CHARACTERISTICS—MAX1084

TIMING CHARACTERISTICS—MAX1085

CONDITIONS

ns

100

CS Pulse Width High

ns

62

SCLK Pulse Width Low

ns

62

ns

156

SCLK Period

SCLK Pulse Width High

ns

65

CS Fall to DOUT Enable

ns

10

65

CS Rise to DOUT Disable

ns

80

SCLK Rise to DOUT Valid

ns

10

SCLK Rise to DOUT Hold

ns

35

CS Fall to SCLK Rise Setup

ns

0

SCLK Rise to CS Rise Hold

ns

35

SCLK Rise to CS Fall Ignore

ns

35

CS Rise to SCLK Rise Ignore

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

CONDITIONS

ns

83

SCLK Pulse Width Low

ns

83

ns

208

SCLK Period

SCLK Pulse Width High

ns

13

85

CS Rise to DOUT Disable

ns

100

SCLK Rise to DOUT Valid

ns

13

SCLK Rise to DOUT Hold

ns

45

CS Fall to SCLK Rise Setup

ns

0

SCLK Rise to CS Rise Hold

ns

45

SCLK Rise to CS Fall Ignore

ns

45

CS Rise to SCLK Rise Ignore

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has

been calibrated.

Note 3: Internal reference, offset, and reference errors nulled.

Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.

Note 5: External load should not change during conversion for specified accuracy. Guaranteed specification limit of 2mV/mA due to

production test limitation.

Characteristics.

3V. DOUT = full scale.

ns

85

CS Fall to DOUT Enable

ns

100

CS Pulse Width High