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MAX1084ACSA Datasheet(PDF) 5 Page - Maxim Integrated Products |
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MAX1084ACSA Datasheet(HTML) 5 Page - Maxim Integrated Products |
5 / 16 page 400ksps/300ksps, Single-Supply, Low-Power, Serial 10-Bit ADCs with Internal Reference _______________________________________________________________________________________ 5 TIMING CHARACTERISTICS—MAX1084 (Figures 1, 2, 8, 9; VDD = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) TIMING CHARACTERISTICS—MAX1085 (Figures 1, 2, 8, 9; VDD = +2.7V to +3.6V, TA = TMIN to TMAX, unless otherwise noted.) CLOAD = 20pF CLOAD = 20pF CLOAD = 20pF CLOAD = 20pF CONDITIONS ns 100 tCSW CS Pulse Width High ns 62 tCL SCLK Pulse Width Low ns 62 tCH ns 156 tCP SCLK Period SCLK Pulse Width High ns 65 tDOE CS Fall to DOUT Enable ns 10 65 tDOD CS Rise to DOUT Disable ns 80 tDOV SCLK Rise to DOUT Valid ns 10 tDOH SCLK Rise to DOUT Hold ns 35 tCSS CS Fall to SCLK Rise Setup ns 0 tCSH SCLK Rise to CS Rise Hold ns 35 tCSO SCLK Rise to CS Fall Ignore ns 35 tCS1 CS Rise to SCLK Rise Ignore UNITS MIN TYP MAX SYMBOL PARAMETER CLOAD = 20pF CLOAD = 20pF CLOAD = 20pF CONDITIONS ns 83 tCL SCLK Pulse Width Low ns 83 tCH ns 208 tCP SCLK Period SCLK Pulse Width High ns 13 85 tDOD CS Rise to DOUT Disable ns 100 tDOV SCLK Rise to DOUT Valid ns 13 tDOH SCLK Rise to DOUT Hold ns 45 tCSS CS Fall to SCLK Rise Setup ns 0 tCSH SCLK Rise to CS Rise Hold ns 45 tCSO SCLK Rise to CS Fall Ignore ns 45 tCS1 CS Rise to SCLK Rise Ignore UNITS MIN TYP MAX SYMBOL PARAMETER Note 1: Tested at VDD = VDD,MIN. Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has been calibrated. Note 3: Internal reference, offset, and reference errors nulled. Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. Note 5: External load should not change during conversion for specified accuracy. Guaranteed specification limit of 2mV/mA due to production test limitation. Note 6: Electrical characteristics are guaranteed from VDD,MIN to VDD,MAX. For operations beyond this range, see Typical Operating Characteristics. Note 7: MAX1084 tested with 20pF on DOUT and fSCLK = 6.4MHz, 0 to 5V. MAX1085 tested with same loads, fSCLK = 4.8MHz, 0 to 3V. DOUT = full scale. CLOAD = 20pF ns 85 tDOE CS Fall to DOUT Enable CLOAD = 20pF ns 100 tCSW CS Pulse Width High |
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