+5V, 1Msps, 4 & 8-Channel,

8-Bit ADCs with 1µA Power-Down

4

_______________________________________________________________________________________

TIMING CHARACTERISTICS

(Note 5)

ns

50

80

RD to INT Delay

(RD Mode)

ns

50

Data-Access Time

(RD Mode)

(Note 7)

(Note 6)

ns

160

ns

70

CS to RDY Delay

ns

0

CS to RD, WR

Hold Time

ns

0

CS to RD, WR

Setup Time

Minimum Acquisition

Time

ns

60

ns

320

Power-Up Time

ns

700

Conversion Time

(RD Mode)

ns

660

Conversion Time

(WR-RD Mode)

Data Hold Time

85

65

185

85

0

0

70

370

875

90

75

260

100

0

0

80

520

975

100

75

35

610

185

(Note 5)

235

60

205

0.35

ns

80

WR to INT Delay

ns

65

RD Pulse Width

(WR-RD Mode)

ns

30

ns

380

500

WR to INT Delay

ns

150

RD to INT Delay

ns

185

Data-Access Time

(WR-RD Mode)

Multiplexer Address

Hold Time

ns

45

ns

160

RD Pulse Width

(WR-RD Mode)

µs

0.25

Delay Between

WR

and

RD Pulses

µs

0.25

10

WR Pulse Width

Data-Access Time

after

INT

0.28

10

120

85

40

700

220

275

70

240

0.45

0.4

10

110

(Note 5)

ns

90

Data-Access Time

(WR-RD Mode)

130

Note 5: See Figure 1 for load circuit. Parameter defined as the time required for the output to cross 0.8V or 2.4V.

Note 6: See Figure 2 for load circuit. Parameter defined as the time required for the data lines to change 0.5V.

Note 7: Also defined as the Minimum Address-Valid to Convert-Start Time.

MAX11_C/E

ALL GRADES

CONDITIONS

MIN

MAX

MIN

MAX

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

MAX11_M

685

865

1125