7

LNA Mode Plots (3.5 GHz match); Vdd = 3 V, Vbias = 2.7 V, Vsd = 0 V

Figure 14. Edwards-Sinsky Output Stability Factor(Mu) at Vdd = 3 V

Figure 15. Edwards-Sinsky Input Stability Factor(Mu’) at Vdd = 3 V

Bypass Mode Plots (3.5 GHz match); Vdd = 3 V, Vbias = 0 V, Vsd = 0 V

Figure 16. Bypass Mode Gain, Input Return Loss, Output Return Loss,

Isolation vs Frequency

Figure 17. Bypass Mode Insertion Loss vs Frequency vs Temperature

Figure 18. Bypass Mode IIP3 vs Frequency vs Temperature

Figure 19. Bypass Mode IIP3 vs Input Power

-40

-35

-30

-25

-20

-15

-10

-5

0

1.0

1.52.0

2.53.0

3.54.0

4.55.0

5.56.0

Frequency (GHz)

Input Return Loss

Output Return Loss

Gain

Isolation

-7.0

-6.5

-6.0

-5.5

-5.0

-4.5

-4.0

-3.5

-3.0

3.0

3.23.43.63.8

4.0

Frequency (GHz)

0

5

10

15

20

25

3.0

3.23.43.63.8

4.0

Frequency (GHz)

0

2

4

6

8

10

12

14

16

18

20

-20

-15

-10

-5

0

5

Pin (dBm)

25° C

85° C

-40° C

25° C

85° C

-40° C