150ksps, 12-Bit, 2-Channel Single-Ended, and

1-Channel True-Differential ADCs in SOT23

10

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Output Data Format

Figures 5a and 5b illustrate the conversion timing for the

MAX1286–MAX1289. The 12-bit conversion result is out-

put in MSB-first format. Data on DOUT transitions

on the falling edge of SCLK. All 12 bits must be clocked

out before CNVST transitions again. For the MAX1288/

MAX1289, data is straight binary for unipolar mode and

two’s complement for bipolar mode. For the MAX1286/

MAX1287, data is always straight binary.

Transfer Function

Figure 6 shows the unipolar transfer function for the

MAX1286–MAX1289. Figure 7 shows the bipolar transfer

function for the MAX1288/MAX1289. Code transitions

occur halfway between successive-integer LSB values.

Applications Information

Automatic Shutdown Mode

With CNVST low, the MAX1286–MAX1289 default to an

AutoShutdown state (<0.2µA) after power-up and

between conversions. After detecting a rising edge on

CNVST, the part powers up, sets DOUT low, and enters

track mode. After detecting a falling edge on CNVST, the

device enters hold mode and begins the conversion. A

maximum of 3.7µs later, the device completes conver-

sion, enters shutdown, and MSB is available at DOUT.

External Reference

An external reference is required for the MAX1286–

MAX1289. Use a 0.1µF bypass capacitor for best per-

formance. The reference input structure allows a volt-

Connection to Standard Interfaces

The MAX1286–MAX1289 feature a serial interface that is

fully compatible with SPI, QSPI, and MICROWIRE. If a

serial interface is available, establish the CPU’s serial

interface as a master, so that the CPU generates the seri-

al clock for the ADCs. Select a clock frequency up to

8MHz.

How to Perform a Conversion

1)

Use a general-purpose I/O line on the CPU to hold

CNVST low between conversions.

2)

Drive CNVST high to acquire AIN1(MAX1286/

MAX1287) or unipolar mode (MAX1288/MAX1289).

To acquire AIN2 (MAX1286/MAX1287) or bipolar

mode (MAX1288/MAX1289), drive CNVST low and

high again.

3)

Hold CNVST high for 1.4µs.

4)

Drive CNVST low and wait approximately 3.7µs for

conversion to complete. After 3.7µs, the MSB is

available at DOUT.

5)

Activate SCLK for a minimum of 12 rising clock

OUTPUT CODE

FULL-SCALE

TRANSITION

11 . . . 111

11 . . . 110

11 . . . 101

00 . . . 011

00 . . . 010

00 . . . 001

00 . . . 000

12

3

0

FS

FS - 3/2LSB

ZS = GND

INPUT VOLTAGE (LSB)

MAX1286–

MAX1289

1LSB =

4096

Figure 6. Unipolar Transfer Function

011 . . . 111

011 . . . 110

000 . . . 010

000 . . . 001

000 . . . 000

111 . . . 111

111 . . . 110

111 . . . 101

100 . . . 001

100 . . . 000

- FS

0

INPUT VOLTAGE (LSB)

OUTPUT CODE

ZS = 0

+FS - 1LSB

FS =

2

-FS =

2

≤

MAX1288/MAX1289

1LSB =

4096

Figure 7. Bipolar Transfer Function