265ksps, +3V, 6-/2-Channel, 12-Bit ADCs

with +2.5V Reference and Parallel Interface

8

_______________________________________________________________________________________

Pin Description (continued)

PIN

MAX1297

REF

21

25

MAX1295

NAME

Bandgap Reference Buffer Output/External Reference Input. Add a 4.7µF capacitor

to GND when using the internal reference.

FUNCTION

26

22

Analog +2.7V to +3.6V Power Supply. Bypass with a 0.1µF capacitor to GND.

27

23

D11

Three-State Digital Output (D11)

28

24

D10

Three-State Digital Output (D10)

_______________Detailed Description

Converter Operation

The MAX1295/MAX1297 ADCs use a successive-

approximation (SAR) conversion technique and an input

track/hold (T/H) stage to convert an analog input signal

to a 12-bit digital output. This output format provides an

easy interface to standard microprocessors (µPs). Figure

2 shows the simplified internal architecture of the

MAX1295/MAX1297.

Single-Ended and

Pseudo-Differential Operation

The sampling architecture of the ADC’s analog com-

parator is illustrated in the equivalent input circuit in

Figure 3. In single-ended mode, IN+ is internally

switched to channels CH0–CH5 for the MAX1295

(Figure 3a) and to CH0–CH1 for the MAX1297 (Figure

3b), while IN- is switched to COM (Table 2). In differen-

tial mode, IN+ and IN- are selected from analog input

pairs (Table 3) and are internally switched to either of

T/H

THREE-STATE, BIDIRECTIONAL

I/O INTERFACE

12

17k

12

SUCCESSIVE-

APPROXIMATION

REGISTER

CHARGE REDISTRIBUTION

12-BIT DAC

CLOCK

ANALOG

INPUT

MULTIPLEXER

CONTROL LOGIC

&

LATCHES

REF

REFADJ

1.22V

REFERENCE

D0–D11

12-BIT DATA BUS

(CH5)

(CH4)

(CH3)

(CH2)

CH1

CH0

COM

CLK

CS

WR

RD

INT

( ) ARE FOR MAX1295 ONLY.

GND

MAX1295

MAX1297

2.05

COMP

Figure 2. Simplified Functional Diagram of 6-/2-Channel MAX1295/MAX1297