MAX1407CAI datasheet(6/48 Pages) MAXIM

Part #	MAX1407CAI

Description	Low-Power, 16-Bit Multichannel DAS with Internal Reference,10-Bit DACs, and RTC

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Manufacturer	MAXIM [Maxim Integrated Products]

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Low-Power, 16-Bit Multichannel DAS with

Internal Reference,10-Bit DACs, and RTC

6

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(DVDD = AVDD = +2.7V to 3.6V, 4.7µF at REF, internal VREF, 18nF between CPLL and AVDD, 32.768kHz crystal across CLKIN and

CLKOUT, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

D0 Output Low Voltage

(MAX1407/MAX1408/MAX1414

only)

ISINK = 200µA, DVDD = +2.7V to +3.6V

0.7

mV

D0 Output High Voltage

(MAX1407/MAX1408/MAX1414

only)

ISOURCE = 2mA, DVDD = +2.7V to +3.6V

DVDD

- 0.1

V

POWER REQUIREMENTS

Run, Idle, and Standby mode

2.7

3.6

Supply Voltage Range

VDD

Sleep mode

1.8

3.6

V

MAX1407/MAX1414

1.15

MAX1408

1.03

Run mode

MAX1409

1.09

mA

MAX1407/MAX1414

650

MAX1408

530

Idle mode

MAX1409

590

Standby mode

MAX1407/MAX1408/

MAX1409/MAX1414

330

Supply Current (Note 5)

IDD

Sleep mode

VDD = 2.7V

MAX1407/MAX1408/

MAX1409/MAX1414

1.7

2.5

µA

TIMING CHARACTERISTICS

(MAX1407/MAX1408/MAX1409/MAX1414: AVDD = DVDD = 2.7V to 3.6V, TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

TIMING PARAMETERS

SCLK Operating Frequency

fSCLK

2.1

MHz

SCLK Cycle Time

tCYC

476

ns

SCLK Pulse Width High

tCH

190

ns

SCLK Pulse Width Low

tCL

190

ns

DIN to SCLK Setup

tDS

100

ns

DIN to SCLK Hold

tDH

0ns

SCLK Fall to Output Data Valid

tDO

CL = 50pF (see load circuit)

200

ns

CS Fall to Output Enable

tDV

CL = 50pF (see load circuit)

240

ns

CS Rise to Output Disable

tTR

CL = 50pF (see load circuit)

240

ns

CS to SCLK Rise Setup

tCSS

100

ns

CS to SCLK Rise Hold

tCSH

0ns

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