the output summing junction where it is gained by

approximately 2.3, which increases the resulting out-

put-referred offset correction resolution to 2.8mV.

Both the Offset TC and FSOTC DACs take their refer-

ence from BDRIVE, a temperature-dependent voltage.

0.6mV. The Offset TC DAC output is fed into the output

summing junction where it is multiplied by approximate-

ly 2.3, thereby increasing the Offset TC correction

range. The buffered FSOTC DAC output is available at

rect FSO TC errors.

Internal Resistors

with the FSOTC DAC) compensates the FSO TC errors.

Ω. If

abled by resetting the appropriate bit (address 07h

reset to zero) in the configuration register (Table 3).

+4600ppm/°C and a nominal resistance of 100k

Ω at

+25°C. This resistor can be used with certain sensor

types that require an external temperature sensor.

Internal EEPROM

The MAX1478 has a 128-bit internal EEPROM arranged

as eight 16-bit words. The four uppermost bits for each

register are reserved. The internal EEPROM is used to

store the following (also shown in the memory map in

Table 4):

1% Accurate, Digitally Trimmed,

Rail-to-Rail Sensor Signal Conditioner

_______________________________________________________________________________________

7

Figure 3. Bridge Excitation Circuit

AA

FSOTC

BDRIVE

EXTERNAL

SENSOR

FSO

DAC

FSOTC

DAC

Table 3. Configuration Register

Input-Referred Offset

0Ah

Input-Referred Offset (LSB)

Input-Referred Offset (IRO) Sign Bit

0Bh

08h

Input-Referred Offset (MSB)

09h

Reserved “0”

06h

Selection

PGA Gain (LSB), A0

07h

04h

Reserved “0”

05h

PGA Gain (MSB), A2

EEPROM

ADDRESS (hex)

02h

DESCRIPTION

PGA Gain, A1

Offset TC Sign Bit, SOTC (+ = 1)

03h

00h

Offset Sign Bit, SOFF (+ = 1)

01h