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MAX1798AEGP Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX1798AEGP Datasheet(HTML) 4 Page - Maxim Integrated Products |
4 / 20 page CDMA Cellular/PCS System Power Supplies 4 _______________________________________________________________________________________ ns 50 tSP Maximum Pulse Width of Spikes that Must Be Suppressed by the Input Filter of Both SDA and SCK Signals ns 100 tSU_DAT Data Setup Time CONDITIONS µs 0 tHD_DAT Data Hold Time µs 1.3 tBUF Bus-Free Time Between START and STOP kHz 400 SCK Clock Frequency µs 0.6 tSU_STA Setup Time Repeated START Condition µs 0.6 tHD_STA Hold Time Repeated START Condition µs 1.3 tLOW SCK Low Period µs 0.6 tHIGH SCK High Period UNITS MIN TYP MAX SYMBOL PARAMETER Setup Time for STOP Condition tSU_STO 0.6 µs SCLK Clock Frequency fSCLK 2 MHz SCLK Low Period tcl 125 ns SCLK High Period tch 125 ns Data Hold Time tHD_DAT 0 ns Data Setup Time tSU_DAT 125 ns CS Assertion to SCLK Rising Edge Setup Time tCSS 200 ns CS Deassertion to SCLK Rising Edge Setup Time tCS1 200 ns SCLK Rising Edge to CS Deassertion tCSH 200 ns SCLK Rising Edge to CS Assertion tCSO 200 ns CS High Period tCSW 300 ns I2C (SMB) TIMING (MAX1799/MAX1799A) SPI TIMING (MAX1798/MAX1798A) ELECTRICAL CHARACTERISTICS (continued) (VIN1 = VIN2/3 = VIN4/5 = VSCLK (SCK) = VDIN (SDA) = V CS (AS) = V OFF = 3.6V; ON = GND = PGND = 0; RSO, ONO, DR1, DR2 = open; BP bypassed with 0.01µF, OUT1 bypassed with 4.7µF; OUT2, OUT3, OUT4, OUT5 bypassed with 2.2µF; OUT1–5 set to 2.98V, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) |
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