Multi-Range (±10V, ±5V, +10V, +5V),

Single +5V, 12-Bit DAS with 8+4 Bus Interface

4

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ELECTRICAL CHARACTERISTICS (continued)

Internal acquisition

3.0

5.0

External reference = 4.096V

After FULLPD or STBYPD

External acquisition (Note 9)

CONDITIONS

Full power-down mode (FULLPD) (Note 7)

5

µs

3.0

Acquisition Time

LSB

PSRR

Power-Supply Rejection Ratio

(Note 8)

3.0

External CLK

µs

V

4.75

5.25

Supply Voltage

6.0

Conversion Time

6.0

7.7

10.0

To 0.1mV REF bypass

capacitor fully discharged

ms

8

Reference Buffer Settling

120

60

Normal mode, bipolar ranges

700

850

Normal mode, unipolar ranges

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

Standby power-down (STBYPD)

mA

18

Supply Current

610

µA

Internal reference

MHz

1.25

1.56

2.00

Internal Clock Frequency

0.1

2.0

External Clock Frequency Range

MHz

External CLK

Internal CLK

Power-up (Note 10)

µs

200

Bandgap Reference

Start-Up Time

External CLK

ksps

100

Throughput Rate

62

V

2.4

Input High Voltage

V

0.8

Input Low Voltage

µA

±10

Input Leakage Current

(Note 5)

pF

15

Input Capacitance

V

0.4

Output Low Voltage

V

Output High Voltage

(Note 5)

pF

15

Three-State Output Capacitance

POWER REQUIREMENTS

TIMING

DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS, HBEN, SHDN) (Note 11)

DIGITAL OUTPUTS (D7–D4, D3/D11, D2/D10, D1/D9, D0/D8, INT)