2:4 1.8V PCIE GEN1-2-3 CLOCK MUX

2

REVISION B 01/26/15

9DMV0431 DATASHEET

Pin Configuration

Power Management Table

Power Connections

Pin Descriptions

24 23 22 21 20 19

DIF_INA 1

18 DIF2#

DIF_INA# 2

17 DIF2

VDDR1.8 3

16 VDD1.8

VDDR1.8 4

15 GND

DIF_INB 5

14 DIF1#

DIF_INB# 6

13 DIF1

78

9 10 11 12

24 VFQFPN, 4x4 mm, 0.5mm pitch

^ prefix indicates internal 120KOhm pull up resistor

v prefix indicates internal 120KOhm pull down resistor

9DMV0431

Connect ePad

to GND

True O/P

Comp. O/P

0

Running

Running

Running

1

Running

Low

Low

DIF_IN

OEx# Pin

DIFx

VDD

GND

324

47

16

15

DIF outputs

Description

Pin Number

Input A receiver analog

Input B receiver analog

Pin# Pin Name

Type

Pin Description

1

DIF_INA

IN

HCSL Differential True input

2

DIF_INA#

IN

HCSL Differential Complement Input

3

VDDR1.8

PWR

1.8V power for differential input clock (receiver). This VDD should be treated as an Analog

power rail and filtered appropriately.

4

VDDR1.8

PWR

1.8V power for differential input clock (receiver). This VDD should be treated as an Analog

power rail and filtered appropriately.

5

DIF_INB

IN

HCSL Differential True input

6

DIF_INB#

IN

HCSL Differential Complement Input

7

GNDR

GND

Analog Ground pin for the differential input (receiver)

8vSW_MODE

IN

Switch Mode. This pin selects either asynchronous or glitch-free switching of the mux. Use

asynchronous mode if 0 or 1 of the input clocks is running. Use glitch-free mode if both input

clocks are running. This pin has an internal pull down resistor of ~120kohms.

0 = asynchronous mode

1 = glitch-free mode

9^OE0#

IN

Active low input for enabling DIF pair 0. This pin has an internal pull-up resistor.

1 =disable outputs, 0 = enable outputs

10

DIF0

OUT

Differential true clock output

11

DIF0#

OUT

Differential Complementary clock output

12

^OE1#

IN

Active low input for enabling DIF pair 1. This pin has an internal pull-up resistor.

1 =disable outputs, 0 = enable outputs

13

DIF1

OUT

Differential true clock output

14

DIF1#

OUT

Differential Complementary clock output

15

GND

GND

Ground pin.