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74LVC4245A Datasheet(PDF) 10 Page - NXP Semiconductors |
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74LVC4245A Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 18 page 74LVC4245A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 10 — 18 December 2012 10 of 18 NXP Semiconductors 74LVC4245A Octal dual supply translating transceiver; 3-state [1] VCCI is the supply voltage associated with the data input port. [2] VCCO is the supply voltage associated with the output port. Test data is given in Table 8. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 8. Load circuitry for switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 8. Test data Supply voltage Input Load VEXT VCC(A) VCC(B) VI [1] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [2] < 2.7 V < 2.7 V VCCI 50 pF 500 open GND 2 V CCO - 2.7 V to 3.6 V 2.7 V 50 pF 500 open GND 2 V CCO 4.5 V to 5.5 V - 3.0 V 50 pF 500 open GND 2 V CCO |
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