ICS8S89832I Data Sheet

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

ICS8S89832AKI REVISION A JANUARY 11, 2010

5

©2010 Integrated Device Technology, Inc.

NOTE 2: Guaranteed by design.

.

AC Electrical Characteristics

NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device

is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal

equilibrium has been reached under these conditions.

All parameters are measured at

≤ 1.5GHz unless otherwise noted.

NOTE 1: Measured from the differential input crossing point to the differential output crossing point.

NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

NOTE 4: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and

with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Differential Input Resistance

IN, nIN

IN to VT, nIN to VT

40

50

60

Ω

Input High Voltage

IN, nIN

1.2

V

Input Low Voltage

IN, nIN

0

V

Input Voltage Swing; NOTE 1

0.15

1.2

V

Differential Input Voltage Swing

0.3

V

Input Current; NOTE 2

IN, nIN

35

mA

Reference Voltage

V

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Differential Output Voltage

247

454

mV

∆V

OD

50

mV

Offset Voltage

1.125

1.375

V

∆V

OS

50

mV

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Operating Frequency

2GHz

Propagation Delay; (Differential)

NOTE 1

300

550

ps

tsk(o)

Output Skew; NOTE 2, 3

25

ps

tsk(pp)

Part-to-Part Skew; NOTE 3, 4

200

ps

tjit

Buffer Additive Phase Jitter, RMS; refer to

Additive Phase Jitter Section

200MHz, Integration Range:

12kHz - 20MHz

0.09

ps

Clock Enable Setup Time

EN to IN, nIN

300

ps

Output Rise/Fall Time

20% to 80%

50

235

ps