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BLF8G10LS-160V Datasheet(PDF) 3 Page - NXP Semiconductors

Part # BLF8G10LS-160V
Description  Power LDMOS transistor
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

BLF8G10LS-160V Datasheet(HTML) 3 Page - NXP Semiconductors

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BLF8G10LS-160V
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 24 October 2012
3 of 11
NXP Semiconductors
BLF8G10LS-160V
Power LDMOS transistor
6.
Characteristics
7.
Test information
7.1 Ruggedness in class-AB operation
BLF8G10LS-160V is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: VDS =30V;
IDq =1100mA; PL = 160 W (CW); f = 925 MHz to 960 MHz.
7.2 Impedance information
Table 6.
DC characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
V(BR)DSS drain-source breakdown voltage VGS =0V; ID =2.2 mA
65
-
-
V
VGS(th)
gate-source threshold voltage
VDS =10 V; ID = 220 mA
1.5
1.9
2.3
V
IDSS
drain leakage current
VGS =0V; VDS = 28 V
--2.8
A
IDSX
drain cut-off current
VGS =VGS(th) +3.75 V;
VDS =10V
-39.0
-
A
IGSS
gate leakage current
VGS =11V; VDS = 0 V
-
-
280
nA
gfs
forward transconductance
VDS =10V; ID = 7.7 A
-
14.9
-
S
RDS(on)
drain-source on-state resistance VGS =VGS(th) + 3.75 V;
ID =7.7 A
-
85
151
m
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF; 3GPP test
model 1; 64 DPCH; f1 = 925 MHz; f2 = 930 MHz; f3 = 955 MHz; f4 = 960 MHz; RF performance at
VDS =30V; IDq = 1100 mA; Tcase =25 C; unless otherwise specified; in a class-AB production test
circuit.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Gp
power gain
PL(AV) = 35 W
18.4
19.9
-
dB
RLin
input return loss
PL(AV) =35W
-
15
10
dB
D
drain efficiency
PL(AV) = 35 W
27
30
-
%
ACPR
adjacent channel power ratio
PL(AV) =35W
-
38
32.5
dBc
Table 8.
Typical impedance information
IDq = 1100 mA; main transistor VDS =30V.
ZS and ZL defined in Figure 1.
f
ZS
ZL
(MHz)
(
)
(
)
925
4.5
 j4.1
1.2
 j2.4
942
5.9
 j4.0
1.2
 j2.3
960
6.2
 j4.7
1.2
 j2.5


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