ICS853S057I Data Sheet

4:1, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL CLOCK DATA MULTIPLEXER

ICS853S057AGI REVISION A MAY 16, 2012

2

©2012 Integrated Device Technology, Inc.

Table 1. Pin Descriptions

NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Function Tables

Table 3. Control Input Function Table

Number

Name

Type

Description

1, 14, 17, 20

Power

Positive supply pins.

2

CLK0

Input

Pulldown

Non-inverting differential clock input.

3

nCLK0

Input

Pulldown

Inverting differential clock input.

4

CLK1

Input

Pulldown

Non-inverting differential clock input.

5

nCLK1

Input

Pulldown

Inverting differential clock input.

6

CLK2

Input

Pulldown

Non-inverting differential clock input.

7

nCLK2

Input

Pulldown

Inverting differential clock input.

8

CLK3

Input

Pulldown

Non-inverting differential clock input.

9

nCLK3

Input

Pulldown

Inverting differential clock input.

10, 11

Power

Negative supply pins.

12, 13

Output

ECL reference outputs.

15, 16

nQ, Q

Output

Differential output pair. ECL/LVPECL interface levels.

18, 19

SEL0, SEL1

Input

Pulldown

Clock select inputs. ECL/LVPECL or LVCMOS interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Input Capacitance

4

pF

Input Pulldown Resistor

51

k

Ω

Control Inputs

Clock Out

SEL1

SEL0

Q, nQ

0

0 (default)

CLK0, nCLK0

01

CLK1, nCLK1

10

CLK2, nCLK2

11

CLK3, nCLK3