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MAX4570CWI Datasheet(PDF) 11 Page - Maxim Integrated Products |
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MAX4570CWI Datasheet(HTML) 11 Page - Maxim Integrated Products |
11 / 16 page Table 3. AUX_ Data-Byte Format (C4 = “1”) Table 4. Clickless Mode/BIAS_ Data-Byte Format (C5 = “1”) 2-Wire Serial Interface The MAX4550 uses a 2-wire, fast-mode, I2C-compatible serial interface. This protocol consists of an address byte followed by the command and data bytes. To address a given chip, the A0 and A1 bits in the address byte must duplicate the values present at the A0 and A1 pins of that chip. The rest of the address bits control MAX4550 operation. The command and data-byte details are described in the Command-Byte and Data-Byte Programming section. The 2-wire serial interface requires only two I/O lines of a standard microprocessor port. Figures 1 and 2 detail the timing diagram for signals on the 2-wire bus, and Table 5 details the format of the signals. The MAX4550 is a receive-only device and must be controlled by a bus master device. A bus master device communicates by transmitting the address byte of the slave device over the bus and then transmitting the desired informa- tion. Each transmission consists of a start condition, the MAX4550’s programmable slave-address byte, a com- mand-byte, a data-byte, and finally a stop condition. The slave device acknowledges the recognition of its address by pulling the SDA line low for one clock peri- od after the address byte is transmitted. The slave device also issues a similar acknowledgment after the command byte and again after the data byte. Start and Stop Conditions The bus-master signals the beginning of a transmission with a start condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a stop condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission. Slave Address (Address Byte) The MAX4550 uses an 8-bit-long slave address. To select a slave address, connect A0 and A1 to V+ or GND. The MAX4550 has four possible slave addresses, thus a maximum of four of these devices may share the same 2-bit address bus. The slave device (MAX4550) monitors the serial bus continuously, waiting for a start condition followed by an address byte. When a slave device recognizes its address (10011A1A00), it acknowledges that it is ready for further communication by pulling the SDA line low while SCL is high. 3-Wire Serial Interface The MAX4570 3-wire serial interface is SPI/ QSPI/MICROWIRE-compatible. An active-low chip- select (CS) input enables the device to receive data from the serial input (DIN). Data is clocked in on the ris- ing edge of the serial-clock (SCLK) signal. A total of 16 bits are needed in each write cycle. Segmented write cycles are allowed (two 8-bit-wide transfers) if CS remains low. The first bit clocked into the MAX4550 is the command byte’s MSB, and the last bit clocked in is the data byte’s LSB. While shifting data, the device remains in its original configuration. After all 16 bits are clocked into the input shift register, a rising edge on CS latches the data into the MAX4570 internal registers, initiating the device’s change of state. Serially Controlled, Dual 4x2, Clickless Audio/Video Analog Crosspoint Switches ______________________________________________________________________________________ 11 Don’t care Don’t care D7 D5 Don’t care D4 Controls output Q1; 1 = set output high, 0 = set output low. Don’t care D6 Controls output Q3; 1 = set output high, 0 = set output low. D3 D1 Controls output Q0; 1 = set output high, 0 = set output low. DESCRIPTION D0 Controls output Q2; 1 = set output high, 0 = set output low. D2 BIT Controls COM2A clickless mode; 1 = enables clickless mode, 0 = disables clickless mode. Controls COM2B clickless mode; 1 = enables clickless mode, 0 = disables clickless mode. D7 D5 Controls COM1A clickless mode; 1 = enables clickless mode, 0 = disables clickless mode. D4 Controls COM2A bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors. Controls COM1B clickless mode; 1 = enables clickless mode, 0 = disables clickless mode. D6 Controls COM2B bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors. D3 D1 Controls COM1A bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors. DESCRIPTION D0 Controls COM1B bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors. D2 BIT |
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