1.25

CMOS Analog Switches

8

_______________________________________________________________________________________

___________Applications Information

Overvoltage Protection

Proper power-supply sequencing is recommended for

all CMOS devices. Do not exceed the absolute maxi-

mum ratings, because stresses beyond the listed rat-

ings can cause permanent damage to the devices.

Always sequence V+ on first, then V-, followed by the

logic inputs, NO, or COM. If power-supply sequencing

is not possible, add two small signal diodes (D1, D2) in

series with supply pins for overvoltage protection

(Figure 1). Adding diodes reduces the analog signal

range to one diode drop below V+ and one diode drop

above V-, but does not affect the devices’ low switch

resistance and low leakage characteristics. Device

operation is unchanged, and the difference between V+

and V- should not exceed 44V. These protection diodes

are not recommended when using a single supply.

COM_

V-

V+

NO_

* INTERNAL PROTECTION DIODES

D2

D1

-15V

+15V

MAX4580

MAX4590

MAX4600

*

*

*

*

tr < 20ns

tf < 20ns

50%

0

LOGIC

INPUT

V-

-15V

100

Ω

NO_

OR NC_

GND

SWITCH

INPUT

IN_

+3V

0

COM_

SWITCH

OUTPUT

SWITCH

OUTPUT

LOGIC

INPUT

LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

V+

35pF

+5V

+15V

0

REPEAT TEST FOR EACH SWITCH. FOR LOAD

CONDITIONS, SEE

Electrical Characteristics.

MAX4580

MAX4590

MAX4600

(

)

Figure 1. Overvoltage Protection Using External Blocking

Diodes

Figure 2. Switching-Time Test Circuit