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MAX4613ESE Datasheet(PDF) 6 Page - Maxim Integrated Products |
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MAX4613ESE Datasheet(HTML) 6 Page - Maxim Integrated Products |
6 / 8 page Quad, SPST Analog Switch 6 _______________________________________________________________________________________ tOFF 0.8 x VOUT VOUT 0.8 x VOUT tf < 20ns tr < 20ns 50% 0V 0V +3V SWITCH OUTPUT LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. tON LOGIC INPUT SWITCH INPUT LOGIC INPUT +3V IN_ +5V V- -15V RL CL VOUT S_ GND CL INCLUDES FIXTURE AND STRAY CAPACITANCE. REPEAT TEST FOR CHANNELS 2, 3, AND 4. ( ) VOUT = VD RL RL + RDS(ON) VL +15V V+ D_ MAX4613 Figure 2. Switching Time Figure 1. Overvoltage Protection Using External Blocking Diodes 50% VO1 VO2 0.9VO +3V 0V VD 0V VD LOGIC INPUT SWITCH OUTPUT SWITCH OUTPUT +5V VL +15V V+ S_ V- -15V CL INCLUDES FIXTURE AND STRAY CAPACITANCE. LOGIC 0 INPUT. 0V GND LOGIC INPUT VD = 10V VD = 10V 0V 0.9VO tD tD IN_ RL2 S_ CL2 VO2 RL1 VO1 CL1 RL = 1000Ω CL = 35pF D_ D_ MAX4613 Figure 3. Break-Before-Make Test Circuit ______________________________________________Timing Diagrams/Test Circuits supply; connect V- to GND when operating with a sin- gle supply. Also, all device types can operate with unbalanced supplies such as +24V and -5V. VL must be connected to +5V to be TTL compatible, or to V+ for CMOS-logic level inputs. The Typical Operating Characteristics graphs show typical on-resistance with ±20V, ±15V, ±10V, and ±5V supplies. (Switching times increase by a factor of two or more for operation at ±5V.) Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings because stresses beyond the list- ed ratings may cause permanent damage to the devices. Always sequence V+ on first, followed by VL, V-, and logic inputs. If power-supply sequencing is not possible, add two small, external signal diodes in series with supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range to 1V below V+ and 1V above V-, but low switch resistance and low leakage char- acteristics are unaffected. Device operation is unchanged, and the difference between V+ and V- should not exceed +44V. V+ D V- S Vg |
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