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MAX470EPE Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX470EPE Datasheet(HTML) 10 Page - Maxim Integrated Products |
10 / 16 page Two-Channel, Triple/Quad RGB Video Switches and Buffers 10 ______________________________________________________________________________________ tCS tSU tH tSU tH tOFF HIGH-Z tON tPD tSW OUTPUTS EN A0 CS LE = V+ Figure 4. Logic Timing Diagram Digital Interface The MAX463–MAX466 multiplexer architecture provides an input transistor buffer, ensuring that no input chan- nels are ever connected together. Select a channel by changing A0's state (A0 = 0 for channel A, and A0 = 1 for channel B) and pulsing C — S – low (see Tables 1a, 1b). Figure 4 shows the logic timing diagram. Output Disable (MAX463–MAX466) When the enable input (E — N – ) is driven to a TTL low state, it enables the MAX463–MAX466 amplifier outputs. When E — N – is driven high, it disables the amplifier outputs. The disabled MAX463/MAX464 outputs exhibit a 250k Ω typical resistance. Because their internal feedback resistors are required to produce a gain of two, the MAX465/MAX466 exhibit a 1k Ω disabled output resis- tance. LE determines whether E — N – is latched by C — S – or operates independently. When the latch-enable input (LE) is con- nected to V+, C — S – becomes the latch control for the E — N – input register. If C — S – is low, both the E — N – and A0 registers are transparent; once C — S – returns high, both registers are latched. MAX468 (NO ISOLATION RESISTOR) GND GND A B 1 µs/div CLOAD = 100pF A: VIN, 500mV/div B: VOUT, 500mV/div Figure 3b. Step Response without an Isolation Resistor MAX468 (WITH ISOLATION RESISTOR) GND GND A B 1 µs/div CLOAD = 100pF, RISOLATION = 12Ω A: VIN, 500mV/div B: VOUT, 500mV/div Figure 3c. Step Response with an Isolation Resistor |
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