+3V/+5V, 12-Bit, Serial Voltage-Output DACs

with Internal Reference

8

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Typical Operating Characteristics (continued)

CS

2V/div

OUT

500mV/div

2

µs/div

MAX5121

DYNAMIC RESPONSE FALL TIME

MAX5120/21-22

SCLK

2V/div

OUT

500

µV/div

AC COUPLED

2

µs/div

MAX5121

DIGITAL FEEDTHROUGH (SCLK, OUT)

MAX5120/21-23

CS

2V/div

OUT

100mV/div

AC COUPLED

5

µs/div

MAX5121

MAJOR CARRY TRANSITION

MAX5120/21-24

Pin Description

PIN

Offset Adjust (Analog Input)

OS

1

FUNCTION

NAME

Analog Output Voltage. High impedance if part is in shutdown.

OUT

2

Power-Down Lockout (Digital Input)

1: Normal operation.

0: Disallows shutdown (device cannot be powered down).

PDL

4

Reset Value Input (Digital Input)

0: Tie to DGND to select 0V as the output reset value.

RSTVAL

3

Active-Low Chip-Select Input (Digital Input)

CS

6

Serial Clock Input

SCLK

8

Serial Data Input. Data is clocked in on the rising edge of SCLK.

DIN

7

Reset DAC Input (Digital Input). Clears the DAC to its predetermined (RSTVAL) output state. Clearing the

DAC will cause it to exit a software shutdown state.

CLR

5

Serial Data Output

DOUT

10

maximum shutdown current of 20µA.

PD

12

User-Programmable Output (Digital Output)

UPO

11

Buffered Reference Output/Input. In internal reference mode, the reference buffer provides a +2.5V

(MAX5120) or +1.25V (MAX5121) nominal output, externally adjustable at REFADJ. In external reference

REF

14

Positive Power Supply. Bypass with a 0.1µF capacitor in parallel with a 4.7µF capacitor to AGND.

16

external reference.

REFADJ

15

Analog Ground

AGND

13

Digital Ground

DGND

9