_______________Detailed Description

The MAX5152/MAX5153 dual, 13-bit, voltage-output

DACs are easily configured with a 3-wire serial inter-

face. These devices include a 16-bit data-in/data-out

shift register, and each DAC has a double-buffered

input comprised of an input register and a DAC register

(see

Functional Diagram). Both DACs use an inverted

R-2R ladder network that produces a weighted voltage

proportional to the input voltage value. Each DAC has

its own reference input to facilitate independent full-

scale values. Figure 1 depicts a simplified circuit dia-

gram of one of the two DACs.

Reference Inputs

The reference inputs accept both AC and DC values

Determine the output voltage using the following equa-

tion:

where NB is the numeric value of the DAC’s binary input

The reference input impedance ranges from 14k

Ω (1555

hex) to several giga ohms (with an input code of 0000

hex). This reference input capacitance is code depen-

dent and typically ranges from 15pF with an input code

of all zeros to 50pF with an input code of all ones.

Output Amplifier

The output amplifier’s inverting input is available to the

user, allowing force and sense capability for remote

sensing and specific gain configurations. The inverting

input can be connected to the output to provide a unity-

gain buffered output. The output amplifiers have a typi-

cal slew rate of 0.75V/µs and settle to 1/2LSB within

25µs, with a load of 10k

Ω in parallel to 100pF. Loads

less than 2k

Ω degrade performance.

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Configurable Outputs

_______________________________________________________________________________________

9

______________________________________________________________Pin Description

PIN

Analog Ground

AGND

1

FUNCTION

NAME

DAC A Output Voltage

OUTA

2

Reference for DAC A

REFA

4

DAC A Output Amplifier Feedback Input. Inverting input of the output amplifier.

FBA

3

Chip-Select Input

CS

6

Serial Clock Input

SCLK

8

Serial Data Input

DIN

7

Active-Low Clear Input. Resets all registers to zero. DAC outputs go to 0V.

CL

5

Serial Data Output

DOUT

10

Power-Down Lockout. The device cannot be powered down when PDL is low.

PDL

12

User-Programmable Output

UPO

11

DAC B Output Amplifier Feedback Input. Inverting input of the output amplifier.

FBB

14

Positive Power Supply

16

DAC B Output Voltage

OUTB

15

Reference Input for DAC B

REFB

13

Digital Ground

DGND

9

OUT_

FB_

SHOWN FOR ALL 1s ON DAC

D0

D10

D11

D12

2R

2R

2R

2R

2R

R

R

R

REF_

AGND

Figure 1. Simplified DAC Circuit Diagram