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8T49N028 Datasheet(PDF) 5 Page - Integrated Device Technology |
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8T49N028 Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 36 page REVISION 1 10/16/14 5 FEMTOCLOCK® NG CRYSTAL-TO-3.3V, 2.5V MULTIPLE FREQUENCY CLOCK GENERATOR W/FANOUT BUFFER 8T49N028 DATA SHEET Table 3B. I2C Register Map NOTE: OEx, LVDS_SELx registers control the Output Bank State and not the Individual Output Channel State. Register Binary Register Address Register Bit D7 D6 D5 D4 D3 D2 D1 D0 0 00000 0 M0[7] M0[6] M0[5] M0[4] M0[3] M0[2] M0[1] 1 00001 0 M1[7] M1[6] M1[5] M1[4] M1[3] M1[2] M1[1] 2 00010 0 M2[7] M2[6] M2[5] M2[4] M2[3] M2[2] M2[1] 3 00011 0 M3[7] M3[6] M3[5] M3[4] M3[3] M3[2] M3[1] 4 00100 0 NB0[6] NB0[5] NB0[4] NB0[3] NB0[2] NB0[1] NB0[0] 5 00101 0 NB1[6] NB1[5] NB1[4] NB1[3] NB1[2] NB1[1] NB1[0] 6 00110 0 NB2[6] NB2[5] NB2[4] NB2[3] NB2[2] NB2[1] NB2[0] 7 00111 0 NB3[6] NB3[5] NB3[4] NB3[3] NB3[2] NB3[1] NB3[0] 8 01000 BYPASS0 PS0[1] PS0[0] P0[1] P0[0] CP0[1] CP0[0] 9 01001 BYPASS1 PS1[1] PS1[0] P1[1] P1[0] CP1[1] CP1[0] 10 01010 BYPASS2 PS2[1] PS2[0] P2[1] P2[0] CP2[1] CP2[0] 11 01011 BYPASS3 PS3[1] PS3[0] P3[1] P3[0] CP3[1] CP3[0] 12 01100 OED0 OEC0 OEB0 OEA0 LVDS_ SELD0 LVDS_ SELC0 LVDS_ SELB0 LVDS_ SELA0 13 01101 OED1 OEC1 OEB1 OEA1 LVDS_ SELD1 LVDS_ SELC1 LVDS_ SELB1 LVDS_ SELA1 14 01110 OED2 OEC2 OEB2 OEA2 LVDS_ SELD2 LVDS_ SELC2 LVDS_ SELB2 LVDS_ SELA2 15 01111 OED3 OEC3 OEB3 OEA3 LVDS_ SELD3 LVDS_ SELC3 LVDS_ SELB3 LVDS_ SELA3 16 10000 0 0 0 0 MUXB0[1] MUXB0[0] MUXA0[1] MUXA0[0] 17 10001 0 0 0 0 MUXB1[1] MUXB1[0] MUXA1[1] MUXA1[0] 18 10010 0 0 0 0 MUXB2[1] MUXB2[0] MUXA2[1] MUXA2[0] 19 10011 0 0 0 0 MUXB3[1] MUXB3[0] MUXA3[1] MUXA3[0] 20 10100 PNA0[1] PNA0[0] NA0[5] NA0[4] NA0[3] NA0[2] NA0[1] NA0[0] 21 10101 PNA1[1] PNA1[0] NA1[5] NA1[4] NA1[3] NA1[2] NA1[1] NA1[0] 22 10110 PNA2[1] PNA2[0] NA2[5] NA2[4] NA2[3] NA2[2] NA2[1] NA2[0] 23 10111 PNA3[1] PNA3[0] NA3[5] NA3[4] NA3[3] NA3[2] NA3[1] NA3[0] |
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