10-Bit, 40MHz, Current/Voltage-Output DACs

8

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Detailed Description

The MAX5181/MAX5184 are 10-bit digital-to-analog con-

verters (DACs) capable of operating with clock speeds

up to 40MHz. Each converter consists of separate input

and DAC registers, followed by a current source array

capable of generating up to 1.5mA full-scale output cur-

rent (Figure 1). An integrated +1.2V voltage reference

and control amplifier determine the data converters’ full-

scale output currents/voltages. Careful reference design

ensures close gain matching and excellent drift charac-

teristics. The MAX5184’s voltage output operation fea-

tures matched 400

Ω on-chip resistors that convert the

current-array current into a voltage.

Internal Reference and

Control Amplifier

The MAX5181/MAX5184 provide an integrated 50ppm/°C,

+1.2V, low-noise bandgap reference that can be dis-

abled and overridden by an external reference voltage.

REFO serves either as an external reference input or an

integrated reference output. If REN is connected to

DGND, the internal reference is selected and REFO

provides a +1.2V output. Due to its limited 10µA output

drive capability, REFO must be buffered with an exter-

nal amplifier if heavier loading is required.

The MAX5181/MAX5184 also employ a control amplifier

designed to regulate simultaneously the full-scale out-

output current is calculated as follows:

amplifier’s output current on the MAX5181 (Figure 2).

This current is mirrored into the current source array,

where it is equally distributed between matched current

segments and summed to valid output current readings

for the DACs.

The MAX5184 converts this output current into a differ-

referenced 400

Ω load resistors. Using the internal

+1.2V reference voltage, the MAX5184’s integrated

9.6k*

REFR

REFO

1.2V REF

REN

CURRENT-

SOURCE ARRAY

DAC SWITCHES

400

Ω*

OUTP

OUTN

400

Ω*

MSB

DECODE

CLK

OUTPUT

LATCHES

OUTPUT

LATCHES

INPUT

LATCHES

*INTERNAL 400

Ω AND 9.6kΩ

RESISTORS FOR MAX5184 ONLY.

INPUT

LATCHES

AGND

CS

DACEN

PD

DGND

CREF

MAX5181

MAX5184

MSB

DECODE

D9–D0

Figure 1. Functional Diagram