2-Wire Serial 8-Bit DACs with

Rail-to-Rail Outputs

8

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The address byte and pairs of command and output

bytes are transmitted between the START and STOP con-

ditions. The SDA state is allowed to change only while

SCL is low, with the exception of START and STOP condi-

tions. SDA’s state is sampled, and therefore must remain

stable while SCL is high. Data is transmitted in 8-bit

bytes. Nine clock cycles are required to transfer the data

bits to the MAX517/MAX518/MAX519. Set SDA low dur-

ing the 9th clock cycle as the MAX517/MAX518/MAX519

current that flows during this time if SDA stays high for

short periods of time.

The START and STOP Conditions

When the bus is not in use, both SCL and SDA must be

high. A bus master signals the beginning of a transmis-

sion with a START condition by transitioning SDA from

high to low while SCL is high (Figure 5). When the mas-

ter has finished communicating with the slave, it issues

a STOP condition by transitioning SDA from low to high

while SCL is high. The bus is then free for another

transmission.

The Slave Address

The MAX517/MAX518/MAX519 each have a 7-bit long

slave address (Figure 6). The first three bits (MSBs) of

the slave address have been factory programmed and

are always 010. In addition, the MAX517 and MAX518

have the next two bits factory programmed to 1s. The

logic state of the address inputs (AD0 and AD1 on the

MAX517/MAX518; AD0, AD1, AD2, and AD3 on the

MAX519) determine the LSB bits of the 7-bit slave

address. These input pins may be connected to VDD or

DGND, or they may be actively driven by TTL or CMOS

logic levels. The MAX517/MAX518 have four possible

slave addresses and therefore a maximum of four of

MAX518

SDA

SCL

µC

SDA

SCL

+5V

AD1

AD0

DUAL

DAC

MAX519

AD0

SDA

REF1

REF0

1k

SCL

+4V

+1V

AD2

AD1

DUAL

DAC

SDA

SCL

AD1

AD0

SINGLE

DAC

MAX517

AD3

OUT0

OFFSET ADJUSTMENT

OUT1

GAIN ADJUSTMENT

OUT0

BRIGHTNESS ADJUSTMENT

OUT1

CONTRAST ADJUSTMENT

REF0

+2.5V

OUT0

THRESHOLD ADJUSTMENT

Figure 3. MAX517/MAX518/MAX519 Application Circuit

SCL

SDA

START CONDITION

STOP CONDITION

REPEATED START CONDITION

START CONDITION

Figure 2. Two-Wire Serial Interface Timing Diagram