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MAX518BCPA Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX518BCPA Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 16 page 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs _______________________________________________________________________________________ 9 these devices may share the bus. The MAX519 has 16 possible slave addresses. The eighth bit (LSB) in the slave address byte should be low when writing to the MAX517/MAX518/MAX519. The MAX517/MAX518/MAX519 monitor the bus continu- ously, waiting for a START condition followed by their slave address. When a device recognizes its slave address, it is ready to accept data. The Command Byte and Output Byte A command byte follows the slave address. Figure 7 shows the format for the command byte. A command byte is usually followed by an output byte unless it is the last byte in the transmission. If it is the last byte, all bits except PD (power-down) and RST (reset) are ignored. If an output byte follows the command byte, A0 of the command byte indicates the digital address of the DAC whose input data latch receives the digital output data. Set this bit to 0 when writing to the MAX517. The data is transferred to the DAC’s output latch during the STOP condition following the transmis- sion. This allows both DACs of the MAX518/MAX519 to be updated simultaneously (Figure 8). Setting the PD bit high powers down the MAX517/ MAX518/MAX519 following a STOP condition (Figure 9a). If a command byte with PD set high is followed by an output byte, the addressed DAC’s input latch will be updated and the data will be transferred to the DAC’s output latch following the STOP condition (Figure 9b). SCL SDA 0 0 1 or AD3 1 or AD2 10 AD1 AD0 LSB ACK SLAVE ADDRESS Figure 6. Address Byte SLAVE ADDRESS BITS AD0, AD1, AD2, AND AD3 CORRESPOND TO THE LOGIC STATE OF THE ADDRESS INPUT PINS. LSB MSB SDA SCL R2 R1 R0 RST PD X X A0/0 ACK Figure 7. Command Byte R2, R1, R0: RESERVED BITS. SET TO 0. RST: RESET BIT, SET TO 1 TO RESET ALL DAC REGISTERS. PD: POWER-DOWN BIT. SET TO 1 TO PLACE THE DEVICE IN THE 4µA SHUTDOWN MODE. SET TO 0 TO RETURN TO THE NORMAL OPERATIONAL STATE. A0: ADDRESS BIT. DETERMINES WHICH DAC'S INPUT LATCH RECEIVES THE 8 BITS OF DATA IN THE NEXT BYTE. SET TO 0 FOR MAX517. ACK: ACKNOWLEDGE BIT. THE MAX517/MAX518/MAX519 PULLS SDA LOW DURING THE 9TH CLOCK PULSE. X: DON’T CARE. START CONDITION STOP CONDITION OUTPUT BYTE COMMAND BYTE SLAVE ADDRESS BYTE SCL SDA MSB MSB MSB LSB LSB LSB ACK ACK ACK Figure 4. A Complete Serial Transmission SCL SDA START CONDITION STOP CONDITION Figure 5. All communications begin with a START condition and end with a STOP condition, both generated by a bus master. |
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