MAX542ACPD datasheet(3/12 Pages) MAXIM

Part #	MAX542ACPD

Description	5V, Serial-Input, Voltage-Output, 16-Bit DACs

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Manufacturer	MAXIM [Maxim Integrated Products]

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+5V, Serial-Input, Voltage-Output, 16-Bit DACs

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3

ELECTRICAL CHARACTERISTICS (continued)

(VDD = +5V ±5%, VREF = +2.5V, AGND = DGND = 0, TA = TMIN to TMAX, unless otherwise noted.)

TIMING CHARACTERISTICS

(VDD = +5V ±5%, VREF = +2.5V, AGND = DGND = 0, CMOS inputs, TA = TMIN to TMAX, unless otherwise noted.)

Note 1: Gain Error tested at VREF = 2.0V, 2.5V, and 3.0V.

Note 2: ROUT tolerance is typically ±20%.

Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance.

Note 4: Reference input resistance is code dependent, minimum at 8555 hex.

Note 5: Slew-rate value is measured from 0% to 63%.

Note 6: Guaranteed by design. Not production tested.

Code = 0000 hex; CS = VDD; LDAC = 0;

SCLK, DIN = 0 to VDD levels

Major-carry transition

VIN = 0

Code = 0000 hex, VREF = 1Vp-p at 100kHz

Code = 0000 hex

Code = FFFF hex

(Note 6)

CONDITIONS

mW

1.5

PD

Power Dissipation

mA

0.3

1.1

IDD

Positive Supply Current

V

4.75

5.25

VDD

Positive Supply Range

V

0.40

VH

Hysteresis Voltage

pF

10

CIN

Input Capacitance

mVp-p

1

nVs

10

nVs

10

DAC Glitch Impulse

Digital Feedthrough

µA

±1

IIN

Input Current

V

0.8

VIL

Input Low Voltage

V

2.4

VIH

Input High Voltage

Reference Feedthrough

dB

92

SNR

Signal-to-Noise Ratio

75

pF

120

CIN

Reference Input Capacitance

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

MAX542 (Note 6)

MAX542

(Note 6)

CONDITIONS

µs

20

VDD High to CS Low

(power-up delay)

ns

45

tCL

SCLK Pulse Width Low

ns

45

tCH

MHz

10

fCLK

SCLK Frequency

SCLK Pulse Width High

ns

50

tLDACS

CS High to LDAC Low Setup

ns

50

tLDAC

LDAC Pulse Width

ns

0

tDH

DIN to SCLK High Hold

ns

40

tDS

DIN to SCLK High Setup

ns

45

tCSS0

CS Low to SCLK High Setup

ns

45

tCSS1

CS High to SCLK High Setup

ns

30

tCSH0

SCLK High to CS Low Hold

ns

45

tCSH1

SCLK High to CS High Hold

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

Code = FFFF hex

MHz

1

BW

Reference -3dB Bandwidth

DYNAMIC PERFORMANCE—REFERENCE SECTION

STATIC PERFORMANCE—DIGITAL INPUTS

POWER SUPPLY

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