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9DBU0541 Datasheet(PDF) 2 Page - Integrated Device Technology |
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9DBU0541 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 16 page 5 O/P 1.5V PCIE GEN1-2-3 FAN-OUT BUFFER W/ZO=100OHMS 2 REVISION D 04/22/15 9DBU0541 DATASHEET Pin Configuration SMBus Address Selection Table Power Management Table Power Connections 32 31 30 29 28 27 26 25 vOE4# 1 24 vOE2# DIF4 2 23 DIF2# DIF4# 3 22 DIF2 VDDR1.5 4 21 VDDA1.5 CLK_IN 5 20 GNDA CLK_IN# 6 19 DIF1# GNDR 7 18 DIF1 GNDDIG 817 vOE1# 9 1011121314 15 16 32-pin VFQFPN, 5x5 mm, 0.5mm pitch v prefix indicates internal 120KOhm pull down resistor 9DBU0541 epad is GND ^ prefix indicates internal 120KOhm pull up resistor ^v prefix indicates internal 120KOhm pull up AND pull down resistor (biased to VDD/2) SADR Address 0 1101011 M 1101100 1 1101101 x State of SADR on first application of CKPWRGD_PD# + Read/Write bit x x True O/P Comp. O/P 0X X X Low Low 1 Running 0 X Low Low 1 Running 1 0 Running Running 1 Running 1 1 Low Low CLK_IN OEx# Pin DIFx CKPWRGD_PD# SMBus OEx bit VDD GND 47 98 16, 21, 25 15,20,26,30 Input receiver analog Digital Power Description Pin Number Note: epad on this device is not electrically connected to the die. It should be connected to ground for best thermal performance. DIF outputs |
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