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MAX5888EGK Datasheet(PDF) 8 Page - Maxim Integrated Products

Part # MAX5888EGK
Description  3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX5888EGK Datasheet(HTML) 8 Page - Maxim Integrated Products

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3.3V, 16-Bit, 500Msps High Dynamic
Performance DAC with Differential LVDS Inputs
8
_______________________________________________________________________________________
Detailed Description
Architecture
The MAX5888 is a high-performance, 16-bit, current-
steering DAC (Figure 1) capable of operating with clock
speeds up to 500MHz. The converter consists of sepa-
rate input and DAC registers, followed by a current-
steering circuit. This circuit is capable of generating
differential full-scale currents in the range of 2mA to
20mA. An internal current-switching network in combi-
nation with external 50
Ω termination resistors convert
the differential output currents into a differential output
voltage with a peak-to-peak output voltage range of
0.1V to 1V. An integrated 1.2V bandgap reference, con-
trol amplifier, and user-selectable external resistor
determine the data converter’s full-scale output range.
Reference Architecture and Operation
The MAX5888 supports operation with the on-chip 1.2V
bandgap reference or an external reference voltage
source. REFIO serves as the input for an external, low-
impedance reference source, and as the output if the
DAC is operating with the internal reference. For stable
operation with the internal reference, REFIO should be
decoupled to AGND with a 0.1µF capacitor. Due to its
limited output drive capability REFIO must be buffered
with an external amplifier, if heavier loading is required.
The MAX5888’s reference circuit (Figure 2) employs a
control amplifier, designed to regulate the full-scale
current IOUT for the differential current outputs of the
DAC. Configured as a voltage-to-current amplifier, the
output current can be calculated as follows:
IOUT = 32 IREFIO - 1LSB
IOUT = 32 IREFIO - (IOUT / 216)
where IREFIO is the reference output current (IREFIO =
VREFIO/RSET) and IOUT is the full-scale output current of
the DAC. Located between FSADJ and DACREF, RSET
is the reference resistor, which determines the amplifi-
er’s output current for the DAC. See Table 1 for a matrix
of different IOUT and RSET selections.
PIN
NAME
FUNCTION
45
B14N
Complementary Data Bit 14
46
B13P
Data Bit 13
47
B13N
Complementary Data Bit 13
48
B12P
Data Bit 12
49
B12N
Complementary Data Bit 12
50
B11P
Data Bit 11
51
B11N
Complementary Data Bit 11
52
B10P
Data Bit 10
53
B10N
Complementary Data Bit 10
54
B9P
Data Bit 9
55
B9N
Complementary Data Bit 9
56
B8P
Data Bit 8
57
B8N
Complementary Data Bit 8
58
B7P
Data Bit 7
59
B7N
Complementary Data Bit 7
63
B6P
Data Bit 6
64
B6N
Complementary Data Bit 6
65
B5P
Data Bit 5
66
B5N
Complementary Data Bit 5
67
B4P
Data Bit 4
68
B4N
Complementary Data Bit 4
Pin Description (continued)


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