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89HPES24NT24G2 Datasheet(PDF) 7 Page - Integrated Device Technology |
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89HPES24NT24G2 Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 35 page  IDT 89HPES24NT24G2 Datasheet 7 of 35 December 17, 2013 PE21TN[0] PE21TP[0] O PCI Express Port 21 Serial Data Transmit. Differential PCI Express transmit pair for port 21. PE22RN[0] PE22RP[0] I PCI Express Port 22 Serial Data Receive. Differential PCI Express receive pair for port 22. PE22TN[0] PE22TP[0] O PCI Express Port 22 Serial Data Transmit. Differential PCI Express transmit pair for port 22. PE23RN[0] PE23RP[0] I PCI Express Port 23 Serial Data Receive. Differential PCI Express receive pair for port 23. PE23TN[0] PE23TP[0] O PCI Express Port 23 Serial Data Transmit. Differential PCI Express transmit pair for port 23. Signal Type Name/Description GCLKN[1:0] GCLKP[1:0] I Global Reference Clock. Differential reference clock input pairs. This clock is used as the reference clock by on-chip PLLs to generate the clocks required for the system logic. The frequency of the differential reference clock is determined by the GCLKFSEL signal. Note: Both pairs of the Global Reference Clocks must be connected to and derived from the same clock source. Refer to the Overview section of Chapter 2 in the PES24NT24G2 User Manual for additional details. P08CLKN P08CLKP I Port Reference Clock. Differential reference clock pair associated with port 8. P16CLKN P16CLKP I Port Reference Clock. Differential reference clock pair associated with port 16. Table 3 Reference Clock Pins Signal Type Name/Description MSMBCLK I/O Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the master SMBus. It is active and generating the clock only when the EEPROM or I/O Expanders are being accessed. MSMBDAT I/O Master SMBus Data. This bidirectional signal is used for data on the master SMBus. SSMBADDR[2,1] I Slave SMBus Address. These pins determine the SMBus address to which the slave SMBus interface responds. SSMBCLK I/O Slave SMBus Clock. This bidirectional signal is used to synchronize transfers on the slave SMBus. SSMBDAT I/O Slave SMBus Data. This bidirectional signal is used for data on the slave SMBus. Table 4 SMBus Interface Pins Signal Type Name/Description Table 2 PCI Express Interface Pins (Part 3 of 3) |
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