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89HPES34H16 Datasheet(PDF) 1 Page - Integrated Device Technology

Part # 89HPES34H16
Description  Sixteen maximum switch ports
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

89HPES34H16 Datasheet(HTML) 1 Page - Integrated Device Technology

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October 3, 2011
 2011 Integrated Device Technology, Inc.
®
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Device Overview
The 89HPES34H16 is a member of the IDT PRECISE™ family of
PCI Express® switching solutions. The PES34H16 is a 34-lane, 16-port
peripheral chip that performs PCI Express packet switching with a
feature set optimized for high-performance applications such as servers,
storage, and communications/networking. It provides connectivity and
switching functions between a PCI Express upstream port and up to
fifteen downstream ports and supports switching between downstream
ports.
Features
High Performance PCI Express Switch
Sixteen maximum switch ports
• Up to three x8 ports that bifurcate up to six x4 ports
• Ten x1 ports
Thirty-four 2.5 Gbps embedded SerDes
• Supports pre-emphasis and receive equalization on per-port
basis
Low-latency cut-through switch architecture
Support for Max Payload Size up to 2048 bytes
Supports two virtual channels and eight traffic classes
PCI Express Base Specification Revision 1.1 compliant
Flexible Architecture with Numerous Configuration Options
Port arbitration schemes utilizing round robin algorithms
Automatic per port link width negotiation from x8 to x4 to x2 or
x1
Automatic lane reversal on all ports
Automatic polarity inversion on all lanes
Supports locked transactions, allowing use with legacy soft-
ware
Ability to load device configuration from serial EEPROM
Ability to control device via SMBus
Highly Integrated Solution
Requires no external components
Incorporates on-chip internal memory for packet buffering and
queueing
Integrates thirty-four 2.5 Gbps embedded full duplex SerDes,
8B/10B encoder/decoder (no separate transceivers needed)
Reliability, Availability, and Serviceability (RAS) Features
Redundant upstream port failover capability
Supports optional PCI Express end-to-end CRC checking
Block Diagram
Figure 1 Internal Block Diagram
34 PCI Express Lanes
Up to 6 x4 ports and 10 x1 Ports
16-Port Switch Core
Frame Buffer
Route Table
Port
Arbitration
Scheduler
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x1
DL/Transaction Layer
SerDes
x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
. . . . . . .
x8/x4/x2/x1
(10)
DL/Transaction Layer
SerDes
x8/x4/x2/x1
89HPES34H16
Data Sheet
34-Lane 16-Port
PCI Express® Switch


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