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89HPES34H16G2 Datasheet(PDF) 7 Page - Integrated Device Technology

Part # 89HPES34H16G2
Description  Low latency cut-through architecture
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

89HPES34H16G2 Datasheet(HTML) 7 Page - Integrated Device Technology

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November 28, 2011
IDT 89HPES34H16G2 Data Sheet
Signal
Type
Name/Description
GCLKN[1:0]
GCLKP[1:0]
I
Global Reference Clock. Differential reference clock input pair. This clock
is used as the reference clock by on-chip PLLs to generate the clocks
required for the system logic. The frequency of the differential reference
clock is determined by the GCLKFSEL signal.
Table 3 Reference Clock Pins
Signal
Type
Name/Description
MSMBADDR[4:1]
I
Master SMBus Address. These pins determine the SMBus address of the serial
EEPROM from which configuration information is loaded.
MSMBCLK
I/O
Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the
master SMBus. It is active and generating the clock only when the EEPROM or I/O
Expanders are being accessed.
MSMBDAT
I/O
Master SMBus Data. This bidirectional signal is used for data on the master SMBus.
SSMBADDR[5,3:1]
I
Slave SMBus Address. These pins determine the SMBus address to which the slave
SMBus interface responds.
SSMBCLK
I/O
Slave SMBus Clock. This bidirectional signal is used to synchronize transfers on the
slave SMBus.
SSMBDAT
I/O
Slave SMBus Data. This bidirectional signal is used for data on the slave SMBus.
Table 4 SMBus Interface Pins
Signal
Type
Name/Description
GPIO[0]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: PART0PERSTN
Alternate function pin type: Input/Output
Alternate function: Assertion of this signal initiated a partition fundamental
reset in the corresponding partition.
GPIO[1]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: PART1PERSTN
Alternate function pin type: Input/Output
Alternate function: Assertion of this signal initiated a partition fundamental
reset in the corresponding partition.
GPIO[2]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: PART2PERSTN
Alternate function pin type: Input/Output
Alternate function: Assertion of this signal initiated a partition fundamental
reset in the corresponding partition.
GPIO[3]
I/O
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: PART3PERSTN
Alternate function pin type: Input/Output
Alternate function: Assertion of this signal initiated a partition fundamental
reset in the corresponding partition.
Table 5 General Purpose I/O Pins (Part 1 of 5)


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