µP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

6

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Pin Description (continued)

PIN

MAX6746

MAX6747

MAX6748–

MAX6751

MAX6752

MAX6753

NAME

FUNCTION

55

—

WDS

Watchdog Select Input. WDS selects the watchdog mode. Connect

WDS to ground to select normal mode and the watchdog timeout

basic timeout period by a factor of 128. A change in the state of WDS

clears the watchdog timer.

——

5

SET1

Logic Input. SET1 selects the watchdog window ratio or disables the

watchdog timer. See Table 1.

6

6

6

WDI

Watchdog Input.

MAX6746–MAX6751: A falling transition must occur on WDI within the

selected watchdog timeout period or a reset pulse occurs. The

watchdog timer clears when a transition occurs on WDI or whenever

RESET is asserted. Connect SWT to ground to disable the watchdog

timer function.

MAX6752/MAX6753: WDI falling transitions within periods shorter than

period. The watchdog timer begins to count after

RESET is deasserted.

The watchdog timer clears when a valid transition occurs on WDI or

whenever

RESET is asserted. Connect SET0 high and SET1 low to

disable the watchdog timer function. See the Watchdog Timer section.

77

7

RESET

Push/Pull or Open-Drain Reset Output.

low for the reset timeout period after all reset conditions are deasserted,

whenever a watchdog fault occurs.

88

8