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LM5025D Datasheet(PDF) 7 Page - Texas Instruments |
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LM5025D Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 31 page  LM5025D www.ti.com SNVSAB0 – JUNE 2015 Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and all MIN and MAX values apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 31.3kΩ, RSET = 27.4kΩ) unless otherwise stated (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PWM COMPARATOR COMP step 5 V to 0 V, Delay to output Time to onset of OUT_A transition 40 ns low Duty cycle range 0 80 % COMP to PWM offset 0.7 1 1.3 V COMP open circuit voltage 4.3 5.9 V COMP short circuit current COMP = 0 V 0.6 1 1.4 mA VOLT x SECOND CLAMP Delta RAMP measured from onset Ramp clamp level of OUT_A to ramp peak, 2.4 2.5 2.6 V COMP = 5 V UVLO SHUTDOWN Undervoltage shutdown threshold 2.44 2.5 2.56 V Undervoltage shutdown hysteresis 16 20 24 µA OUTPUT SECTION OUT_A high saturation MOS device at IOUT = –10 mA 5 10 Ω OUTPUT_A peak current sink Bipolar device at Vcc/2 3 A OUT_A low saturation MOS device at IOUT = 10 mA 6 9 Ω OUTPUT_A rise time CGATE = 2.2 nF 20 ns OUTPUT_A fall time CGATE = 2.2 nF 15 ns OUT_B high saturation MOS device at IOUT = –10 mA 10 20 Ω OUTPUT_B peak current sink Bipolar device at VCC/2 1 A OUT_B low saturation MOS device at IOUT = 10 mA 12 18 Ω OUTPUT_B rise time CGATE = 1 nF 20 ns OUTPUT_B fall time CGATE = 1 nF 15 ns OUTPUT TIMING CONTROL RSET = 38 kΩ connected to GND, Overlap time 75 105 135 ns 50% to 50% transitions RSET = 29.5 kΩ connected to REF, Deadtime 75 105 135 ns 50% to 50% transitions THERMAL SHUTDOWN TSD Thermal shutdown threshold 165 °C Thermal shutdown hysteresis 25 °C Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM5025D |
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