Power-Supply Monitor with Reset

4

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__________Applications Information

In addition to issuing a reset to the microprocessor

(µP) during power-up, power-down, and brownout con-

ditions, the MAX709 is relatively immune to short dura-

Figure 1 shows typical transient duration vs. reset com-

parator overdrive, for which the MAX709 does not gen-

erate a reset pulse. The graph was generated using a

above the actual reset threshold and ending below it

by the magnitude indicated (reset comparator over-

drive). The graph indicates the typical maximum pulse

without causing a reset pulse to be issued. As the

magnitude of the transient increases (goes farther

below the reset threshold), the maximum allowable

pulse

width

decreases.

Typically,

for

the

below the reset threshold and lasts 40µs or less will not

cause a reset pulse to be issued.

A 0.1µF bypass capacitor mounted as close as possible

Ensuring a Valid RESET Output

no longer sinks current—it becomes an open circuit.

Therefore, high-impedance CMOS logic inputs con-

nected to the RESET output can drift to undermined

voltages. This presents no problem in most applica-

tions, since most µP and other circuitry is inoperative

RESET output must be valid down to 0V, adding a pull-

down resistor to the RESET pin will cause any stray

leakage currents to flow to ground, holding RESET low

(see Figure 2). The resistance value of R1 is not criti-

cal. It should be about 100k

Ω, which is large enough

not to load RESET and small enough to pull RESET to

ground.

____________________Pin Description

PIN

NAME

FUNCTION

N.C.

No Connect. There is no internal

connection to this pin.

2

+5V, +3.3V, or +3V Supply Voltage

3

GND

Ground

7

RESET

1, 4, 5,

6, 8

below the reset threshold, and for

threshold.

150

0

10

100

10k

50

100

1k

MAX709L/M

MAX709R/S/T

10ns

Figure 1. Maximum Transient Duration without Causing a

Reset Pulse vs. Reset Comparator Overdrive