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MAX7401CPA Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX7401CPA Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 12 page 8th-Order, Lowpass, Bessel, Switched-Capacitor Filters _______________________________________________________________________________________ 9 GND to the negative supply. Figure 4 shows an example of dual-supply operation. Single- and dual-supply perfor- mance are equivalent. For either single- or dual-supply operation, drive CLK and SHDN from GND (V- in dual- supply operation) to VDD. For ±5V dual-supply applica- tions, use the MAX291–MAX297. Input Signal Amplitude Range The optimal input signal range is determined by observ- ing the voltage level at which the total harmonic distor- tion plus noise (THD+N) is minimized for a given corner frequency. The Typical Operating Characteristics show graphs of the devices’ THD+N response as the input signal’s peak-to-peak amplitude is varied. These mea- surements are made with OS and COM biased at mid- supply. Anti-Aliasing and Post-DAC Filtering When using the MAX7401/MAX7405 for anti-aliasing or post-DAC filtering, synchronize the DAC and the filter clocks. If the clocks are not synchronized, beat frequen- cies may alias into the passband. The high clock-to-corner frequency ratio (100:1) also eases the requirements of pre- and post-SCF filtering. At the input, a lowpass filter prevents the aliasing of fre- quencies around the clock frequency into the passband. At the output, a lowpass filter attenuates the clock feedthrough. A high clock-to-corner frequency ratio allows a simple RC lowpass filter, with the cutoff frequency set above the SCF corner frequency, to provide input anti-aliasing and reasonable output clock attenuation. Harmonic Distortion Harmonic distortion arises from nonlinearities within the filter. These nonlinearities generate harmonics when a pure sine wave is applied to the filter input. Table 1 lists the MAX7401/MAX7405’s typical harmonic-distortion values with a 10k Ω load at TA = +25°C. VDD V+ V- IN CLK GND INPUT OUTPUT OUT 0.1 µF CLOCK *DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE. SHDN COM OS 0.1 µF MAX7401 MAX7405 * V+ V- Figure 4. Dual-Supply Operation 5th 3rd -92 -79 -93 -83 500 100 fCLK (kHz) 4th 2nd -92 -90 TYPICAL HARMONIC DISTORTION (dB) -89 -91 4 5 1 MAX7401 VIN (Vp-p) fC (kHz) FILTER 1000 200 fIN (Hz) Table 1. Typical Harmonic Distortion TRANSISTOR COUNT: 1116 Chip Information -88 -82 -88 -83 500 100 -88 -87 -83 -87 2 5 1 MAX7405 1000 200 |
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