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TDC1011 Datasheet(PDF) 7 Page - Texas Instruments

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Part # TDC1011
Description  TDC1011 Single Channel Ultrasonic Sensing Analog Front End (AFE) for Level Sensing,Concentration Sensing Applications
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TDC1011 Datasheet(HTML) 7 Page - Texas Instruments

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t7
t8
t3
t2
t1
t4
t5
t6
D15
D0
D14
SCLK
CSB
Prior D15
t9
Prior D1
Prior D0
90%
10%
tr
90%
10%
tf
TDC1011
www.ti.com
SNAS662 – JULY 2015
6.6 Timing Requirements
TA = 25°C, VDD = VIO = 3.7 V and ƒSCLK = 1 MHz (unless otherwise noted).
MIN
NOM
MAX
UNIT
ƒSCLK
Serial clock frequency
26
MHz
t1
High period, SCLK
16
ns
t2
Low period, SCLK
16
ns
t3
Set-up time, nCS to SCLK
10
ns
t4
Set-up time, SDI to SCLK
12
ns
t5
Hold time, SCLK to SDI
12
ns
t6
SCLK transition to SDO valid time
16
ns
t7
Hold time, SCLK transition to nCS rising edge
10
ns
t8
nCS inactive
17
ns
t9
Hold time, SCLK transition to nCS falling edge
10
ns
tr / tf
Signal rise and fall times(1)
1.8
ns
(1)
The slew rate is measured from 10% to 90% and is represented by the average of the rising and falling slew rates.
Figure 1. SPI Timing Diagram
6.7 Switching Characteristics
TA = 25°C, VDD = VIO = 3.7 V, ƒCLKIN = 8 MHz.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
START, STOP, ENABLE, RESET, CLOCKIN, TRIGGER, ERR
TX_FREQ_DIV = 2h, NUM_TX = 1
1
μs
PWSTART Pulse width for START signal TX_FREQ_DIV = 2h, NUM_TX = 2
2
μs
TX_FREQ_DIV = 2h, NUM_TX
≥ 3
3
μs
tr / tf
Rise/fall time for START
20% to 80%, 20-pF load
0.25
ns
START
signal
tr / tf STOP Rise/fall time for STOP signal 20% to 80%, 20-pF load
0.25
ns
Maximum CLKIN input
ƒCLKIN
16
MHz
frequency
tr / tf CLKIN CLKIN input rise/fall time
(1)
20% to 80%
10
ns
TRIGGER input rise/fall
tr / tf TRIG
20% to 80%
10
ns
time(1)
tEN_TRIG
Enable to trigger wait time(1)
50
ns
TX_FREQ_DIV = 2h (see TX/RX Measurement
tRES_TRIG Reset to trigger wait time
(1)
3.05
μs
Sequencing and Timing)
(1)
Specified by design.
Copyright © 2015, Texas Instruments Incorporated
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