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CMX7261 Datasheet(PDF) 11 Page - CML Microcircuits

Part # CMX7261
Description  Full-duplex operation
Download  64 Pages
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Manufacturer  CMLMICRO [CML Microcircuits]
Direct Link  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

CMX7261 Datasheet(HTML) 11 Page - CML Microcircuits

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CMX7261 Voice Multi-transcoder
CMX7261
 2012 CML Microsystems Plc
Page 11
D/7261_FI-1.x/9
64-pin
Q1/L9
Pin
Signal Description
Pin No.
Name
Type
45
DVDD3V3
PWR
3.3V positive supply rail for the digital on-chip circuits. This
pin should be decoupled to DVSS by capacitors mounted
close to the supply pins.
46
NC
NC
Do not connect.
47
DVSS
PWR
Negative supply rail (ground) for the digital on-chip circuits.
48
DVSS
PWR
Negative supply rail (ground) for the digital on-chip circuits.
49
XTALN
OP
Output of the on-chip xtal oscillator inverter.
50
XTAL/CLOCK
IP
Input to the oscillator inverter from the xtal circuit or external
clock source.
51
NC
NC
Do not connect.
52
NC
NC
Do not connect.
53
SCLK
IP
C-BUS serial clock input from the µC.
54
RDATA
TS OP
3-state C-BUS serial data output to the µC. This output is
high impedance when not sending data to the µC.
55
CDATA
IP
C-BUS serial data input from the µC.
56
CSN
IP
C-BUS chip select input from the µC.
57
IRQN
OP
‘wire-Orable’ output for connection to the Interrupt Request
input of the µC. This output is pulled down to DVSS when
active and is high impedance when inactive. An external
pull-up resistor is required.
58
DVCORE2
PWR
Digital core supply, nominally 1.8V. Normally this will be
supplied by the on-chip regulator, although an option is
available to use an external regulator. This pin should be
decoupled to DVSS by capacitors mounted close to the
device pins and connected with a power supply track to
DVCORE1. For details see programming register P1.19 in
section in 10.1.2 Program Block 1
– Clock Control.
59
SDO
OP
While booting FI:
SPI: Master Out Slave In (MOSI).
While running FI:
PCM: Serial Data Out.
60
FSO
OP
PCM: Frame Sync Out.
61
SDI
IP
While booting FI:
SPI: Master In Slave Out (MISO).
While running FI:
PCM: Serial Data In.
62
SSOUT0
OP
SPI: Slave Select Out 0.
63
CLKO
OP
While booting FI:
SPI: Serial Clock (SCLK).
While running FI:
PCM: Serial Clock Out.
64
FSI
BI
PCM: Frame Sync In.


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