Dual-Slot PCMCIA Analog Power Controller

8

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B_-VCC_5

B_-VCC_3

B_VPP_VCC

B_VPP_PGM

A_-VCC_5

A_-VCC_3

A_VPP_VCC

A_VPP_PGM

VPP_VALID

CIRRUS LOGIC

CL-PD6720

AVPP1

AVPP0

AVCC1

AVCC0

BVPP1

BVPP0

BVCC1

BVCC0

AGPI

BGPI

GND

C1

C2

MAX780_

Figure 2. Logic Connections to CL-PD6720

AVPP0

AVPP1

AVCC0

AVCC1

BVCC0

BVCC1

BVPP0

BVPP1

GND

MAX780_

ADDRESS

DECODE

WR

ADDRESS

BUS

WR

DATA

BUS

D0

D1

D2

D3

D4

D5

D6

D7

VCCIN

C2

+5V

Figure 3. Direct Connection to System Bus

WR

_VPP_,

_VCC_

Figure 4. C2 = VCCIN Mode Timing

10nF

+5V

0.1

µF

GATE-DRIVE

SUPPLY OUTPUT

CLOCK

ON/

OFF

CLOCK

ON/

OFF

3.3V

10nF

10nF

ALL DIODES 1N914

0.1

µF

0.1

µF

GATE-DRIVE

SUPPLY OUTPUT

Figure 5. Alternative Gate-Drive Charge-Pump Supplies