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PESD5V0V2BMB Datasheet(PDF) 6 Page - NXP Semiconductors |
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PESD5V0V2BMB Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 12 page NXP Semiconductors PESD5V0V2BMB Very low capacitance bidirectional ESD protection diodes PESD5V0V2BMB All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved Product data sheet 17 August 2015 6 / 12 10. Application information The device is designed for the protection of up to two bidirectional data lines from surge pulses and ESD damage. Fig. 11. Application diagram 006aab332 DUT GND signal lines Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. Minimize the path length between the device and the protected line. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Use ground planes whenever possible. For multilayer PCBs, use ground vias. 11. Test information 11.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. |
Similar Part No. - PESD5V0V2BMB_15 |
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Similar Description - PESD5V0V2BMB_15 |
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