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TPS61230 Datasheet(PDF) 9 Page - Texas Instruments |
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TPS61230 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 31 page SW IN L OUT IN OUT L SW _ LIM ) MAX ( OUT f D L V I V V V D I 2 1 I ) D 1 ( I ´ = D - = ÷ ø ö ç è æ D + ´ - = R E F O U T I N S S S S V V V 1 A 5 C t ´ ÷÷ ø ö çç è æ - ´ = m TPS61230, TPS61231, TPS61232 www.ti.com SLVSAQ2C – JANUARY 2014 – REVISED OCTOBER 2014 Feature Description (continued) start phase, the SS pin voltage limits the FB pin voltage, and the output voltage rising slope follows the SS pin voltage slope. The capacitor connected to the SS pin is charged by the internal bias current of ISS, giving the time of the soft start phase shown in Equation 1. The larger the soft start capacitor, the longer the soft start phase time. Leaving the SS pin floating sets the minimum soft startup phase time. The device finishes the soft start phase and operates normally when the nominal output voltage is reached. (1) The SS pin voltage is discharged in the cases when the device gets disabled by the EN pin, thermal shutdown and undervoltage lockout. The SS pin may be left floating to disable the soft start phase and start up with the fastest time. In zero duty cycle mode, only the pre-charge phase works during startup. 8.3.2 Current Limit Operation The device employs a valley current sensing scheme. Switch valley current limit detection occurs during the off time through sensing of the voltage drop across the synchronous rectifier. If the current is above the valley current limit level when it is time to turn off the synchronous rectifier, the device instead keeps the synchronous rectifier on until its current decreases below the valley current limit level. The maximum continuous output current IOUT(MAX), before entering switch valley current limit operation, is defined by Equation 2. (2) Where ILIM_SW = Switch valley current limit L = Inductor value fSW = Switching frequency When the switch current limit is reached, the output voltage decreases from further load increase. The switch valley current limit works in PWM, PFM and Zero Duty Cycle Mode operations. Another current limit scheme, pre-charge current limit, ILIM_Pre is implemented. Pre-charge current limit detection works when VOUT < VOUT_NOM and VOUT < VIN . It can happen when the device is in the pre-charge phase or an over load condition. It impacts the minimum load resistance at startup as shown in Figure 14 and Figure 27. 8.3.3 Enable/Disable The EN pin is connected to an ON/OFF detector (ON/OFF) and an input of the Enable Comparator, shown in the functional block diagram. With a voltage level of 0.4 V or less at the EN pin, the ON/OFF detector turns the device into Shutdown mode and the quiescent current is reduced to typically 1.5 uA. In this mode, the EN comparator and the entire internal control circuitry are switched off. A voltage level of typically 0.9 V at the EN pin triggers the ON/OFF detector and activates the internal reference, the EN comparator and the UVLO comparator. Once the ON/OFF detector has tripped, the quiescent current into the VIN pin is typically 1.5 μA. The TPS6123x starts regulation once the voltage at the EN pin trips the threshold VEN_TH_ON and the VIN pin voltage is above the UVLO threshold. The device enters startup and ramps up the output voltage. The TPS6123x stops regulation once the voltage on the EN pin falls blow the threshold VEN_TH_OFF or the VIN pin voltage falls below the UVLO threshold. For proper operation, The EN pin must be terminated and must not be left floating. An external logic signal applied directly to the EN pin can enable/disable the device. The device can be driven into shutdown mode by pulling the EN pin to GND. In this mode, true load disconnect between the battery and load prevents current flow from VIN to VOUT, as well as reverse flow from VOUT to VIN. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TPS61230 TPS61231 TPS61232 |
Similar Part No. - TPS61230_15 |
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Similar Description - TPS61230_15 |
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