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PPHDMI2020G-R40-R Datasheet(PDF) 2 Page - Unisonic Technologies |
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PPHDMI2020G-R40-R Datasheet(HTML) 2 Page - Unisonic Technologies |
2 / 6 page PPHDMI2020 Preliminary TVS UNISONICTECHNOLOGIESCO.,LTD 2 of 6 www.unisonic.com.tw QW-R223-025.c PIN CONFIGURATION PIN DESCRIPTION PIN NO. PIN NAME DESCRIPTION 1 5V_SUPPLY Current source for 5V_OUT. 2 LV_SUPPLY Bias for CE / DDC / HOTPLUG level shifters. 3, 38 GND Supply GND reference. 4, 37 TMDS_D2+ TMDS 0.9pF ESD protection (Note 1). 5, 8, 11, 14, 27, 30, 33, 36 TMDS_GND TMDS ESD and Parasitic GND return. (Note 3) 6, 35 TMDS_D2- TMDS 0.9pF ESD protection. (Note 1) 7, 34 TMDS_D1+ TMDS 0.9pF ESD protection. (Note 1) 9, 32 TMDS_D1- TMDS 0.9pF ESD protection. (Note 1) 10, 31 TMDS_D0+ TMDS 0.9pF ESD protection. (Note 1) 12, 29 TMDS_D0- TMDS 0.9pF ESD protection. (Note 1) 13, 28 TMDS_CK+ TMDS 0.9pF ESD protection. (Note 1) 15, 26 TMDS_CK- TMDS 0.9pF ESD protection. (Note 1) 16 CE_REMOTE_IN LV_SUPPLY referenced logic level into ASIC. 17 DDC_CLK_IN LV_SUPPLY referenced logic level into ASIC. 18 DDC_DAT_IN LV_SUPPLY referenced logic level into ASIC. 19 HOTPLUG_DET_IN LV_SUPPLY referenced logic level into ASIC. 20, 21 NC 22 HOTPLUG_DET_OUT 5V_SUPPLY referenced logic level out plus 3.5pF ESD (Note 2) to connector 23 DDC_DAT_OUT 5V_SUPPLY referenced logic level out plus 3.5pF ESD to connector. 24 DDC_CLK_OUT 5V_SUPPLY referenced logic level out plus 3.5pF ESD to connector. 25 CE_REMOTE_OUT 5V_SUPPLY referenced logic level out plus 3.5pF ESD to connector. 39 ESD_BYP This pin must be connected to a 0.1µF ceramic capacitor. 40 5V_OUT 55mA minimum overcurrent protected 5V output. This output must be bypassed with a 0.1µF ceramic capacitor Noets: 1. These 2 pins need to be connected together in-line on the PCB. 2. This output can be connected to an external 0.1µF ceramic capacitor, resulting in an increased ESD withstand voltage rating. 3.These pins should be routed directly to the associated GND pins on the HDMI connector with single point ground vias at the connector. |
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