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ISL6401CBZ Datasheet(PDF) 7 Page - Intersil Corporation

Part # ISL6401CBZ
Description  Synchronizing Current Mode PWM for Subscriber Line Interface Circuits (SLICs)
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL6401CBZ Datasheet(HTML) 7 Page - Intersil Corporation

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7
FN9007.7
April 13, 2005
signal generation and off-hook loop current supply are two
analog functions that are performed by Subscriber Line
Interface Circuits (SLICs). A SLIC is the primary interface
between the 4-wire (ground referenced) low voltage switch
environment and the 2 wire (floating) high voltage loop
environment. It performs a number of important functions
including battery feed, overvoltage protection, ringing,
signaling, coding, hybrid balancing and testing.
The Ringing SLIC (RSLIC) typically requires two high
voltage power supply inputs. The first is a tightly regulated
voltage around -24V or -48V for off-hook voice transmission.
The second is a loosely regulated -70 to -100V for ring tone
generation. When the switch hook is released the phone
puts approximately 200
Ω of resistance across the phone
terminals. Once voice transmission begins, the SLIC
requires a lower voltage input to establish a current loop of
approximately 25mA. The loop feeds the 200
Ω, protection
resistors, and line resistances within the phone.
ISL6401 Flyback Reference Design
The Typical Application Schematic shows a current mode
power supply using the Intersil ISL6401 in a standard
flyback topology. The IC requires +5V Bias. The application
circuit is intended for wall adapters that power home
gateway/router boxes. This circuit input voltage can be 9V
to 20V with the selected transformer and external
components.
The output voltages are -24V at 120mA and -72V at
120mA. The circuit uses inexpensive transformers to
generate both outputs using a single controller. The
transformer turns ratio is such that 24V appear across each
secondary winding and the primary during the switch off-
time. The remaining secondary windings are stacked in
series to develop -48V. The -48V section is then stacked on
the -24V section to get the -72V. This technique provides
good cross regulation, lowers the voltage rating required
for the output capacitors, and lowers the RMS current,
allowing the use of less expensive output capacitors. Also,
the selection of a transformer with multifilar winding lowers
the leakage inductance and cost. The -24V output is
precisely regulated by feeding back this output to the
controller. The -72V output is derived from the third pair of
windings. Regulation of this output is obtained by the turn’s
ratio of the transformer with -24V output, as well as with
split feedback.
Circuit Element Descriptions
• Transformers T1, MOSFET Q1, Schottky diode D1, D2,
and input capacitor C1 and C2 form the power stage of
the converter. Power resistor R5 senses the switch
current and converts this current into a voltage to be
sensed by the primary side controller feedback
comparator.
• Capacitors C9 to C12 filter out high frequency noise on the
output bus directly at the output diode.
• R7 and C8 provide secondary side snubbing.
• R6 and C7 filter out the leading edge voltage spikes
resulting from the leakage inductance of the transformer.
• C4 sets the switching frequency of the converter.
• C3 is a decoupling capacitor, which should always be a
good quality low-ESR/ESL type capacitor, placed as close
to the IC pins as possible and returned directly to the IC
ground reference.
• The gate drive circuitry can be composed of a small gate
drive resistor, necessary for damping any oscillations
resulting from the input capacitance of Q1 and any
parasitic stray inductance.
• The voltage sense feedback loop is comprised of R4 and
R3. Feedback components R1, C6, and C5 provide the
necessary gain and pole to stabilize the control loop.
Component Selection Guidelines
Power MOSFET
The MOSFET switch is selected to meet the drain to source
voltage stress resulting from the maximum input voltage
(VIN(max)), the reflected secondary voltages, equal to the
output voltage (VOUT), plus the output diode voltage drop
(VF), and the voltage spike due to the leakage inductance,
assumed to be 30% of the input voltage.
Vds (stress) = [(VIN(max)) + (N)(Vout +Vf)] + (0.3)(VIN(max))
The switch must also be able to conduct the repetitive peak
primary current as determined by:
Ipeak (primary) = (Vinmin - Vds) (tON(max)) / Lp
The primary current waveform of a discontinuous mode
flyback converter is triangular in shape, therefore, its root
mean square(rms) current is calculated by:
The chosen device should also have a low RDS(ON) value,
because the conduction losses of the device are proportional
to the square of the primary rms current through the device.
Selection of a device that has a peak current rating of at
least three times the peak current usually insures acceptably
low conduction losses.
Pconduction = (Iprms2) (RDS(on))
Irms prim
()
IPEAKprim
3
()
TONmax
() T
()
=
ISL6401


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