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OMAP4470 Datasheet(PDF) 4 Page - Texas Instruments |
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OMAP4470 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 450 page  Public Version OMAP4470 SWPS048A – AUGUST 2012 – REVISED JANUARY 2013 www.ti.com 3.3.2 LPDDR2 DC Electrical Characteristics ..................................................................... 131 3.3.3 Camera DC Electrical Characteristics ...................................................................... 134 3.3.4 Display DC Electrical Characteristics ....................................................................... 136 3.3.5 HDQ/1-Wire DC Electrical Characteristics ................................................................. 137 3.3.6 I 2C DC Electrical Characteristics ............................................................................ 138 3.3.7 Audio McBSP / PDM / DMIC DC Electrical Characteristics ............................................. 140 3.3.8 McSPI DC Electrical Characteristics ........................................................................ 142 3.3.9 UART DC Electrical Characteristics ........................................................................ 145 3.3.10 USB DC Electrical Characteristics .......................................................................... 148 3.3.11 MMC/SDIO DC Electrical Characteristics .................................................................. 154 3.3.12 JTAG DC Electrical Characteristics ......................................................................... 157 3.3.13 DPM DC Electrical Characteristics ......................................................................... 157 3.3.14 Keypad DC Electrical Characteristics ...................................................................... 160 3.3.15 System DC Electrical Characteristics ...................................................................... 161 3.4 External Capacitors ...................................................................................................... 165 3.4.1 Voltage Decoupling Capacitors .............................................................................. 165 3.4.1.1 Core, MPU, IVA, Audio Voltage Decoupling .................................................. 165 3.4.1.2 IO Voltage Decoupling ........................................................................... 166 3.4.1.3 Analog Voltage Decoupling ..................................................................... 168 3.4.2 Output Capacitors ............................................................................................. 172 3.5 Power-up, Power-down and Power-off Sequences ................................................................. 175 3.5.1 Power-Up Sequence .......................................................................................... 175 3.5.2 Power-Down Sequence ...................................................................................... 176 3.5.3 Power-Off Sequence ......................................................................................... 177 4 Clock Specifications ........................................................................................................ 179 4.1 Input Clock Specifications .............................................................................................. 181 4.1.1 Input Clock Requirements ................................................................................... 181 4.1.2 sys_32k CMOS Input Clock ................................................................................. 181 4.1.3 fref_xtalin CMOS Input Clock ................................................................................ 182 4.1.3.1 fref_xtal_in / fref_xtal_out External Crystal .................................................... 182 4.1.3.2 fref_xtal_in Squarer Input Clock ................................................................ 183 4.1.4 fref_slicer_in Input Clock ..................................................................................... 184 4.2 Output Clocks Specifications ........................................................................................... 186 4.2.1 FREF Output Clocks .......................................................................................... 186 4.3 DPLLs, DLLs Specifications ............................................................................................ 188 4.3.1 DPLLs Characteristics ........................................................................................ 189 4.3.2 DLLs Characteristics .......................................................................................... 191 4.3.3 DPLLs and DLLs Noise Isolation ............................................................................ 191 4.4 Internal 32-kHz Oscillator ............................................................................................... 191 5 Timing Requirements and Switching Characteristics ........................................................... 192 5.1 Timing Test Conditions .................................................................................................. 192 5.2 Interface Clock Specifications .......................................................................................... 192 5.2.1 Interface Clock Terminology ................................................................................. 192 5.2.2 Interface Clock Frequency ................................................................................... 192 5.2.3 Clock Jitter Specifications .................................................................................... 192 5.2.4 Clock Duty Cycle Error ....................................................................................... 193 5.3 Timing Parameters ....................................................................................................... 193 5.4 External Memory Interface .............................................................................................. 193 5.4.1 General-Purpose Memory Controller (GPMC) ............................................................ 194 5.4.1.1 GPMC/NOR Flash Interface—Synchronous Mode—58.25 MHz ........................... 194 5.4.1.2 GPMC/NOR Flash Interface—Synchronous Mode—100 MHz ............................. 203 5.4.1.3 GPMC/NOR Flash Interface—Synchronous Mode—66 MHz .............................. 211 5.4.1.4 GPMC/NOR Flash Interface—Asynchronous Mode ......................................... 221 4 Contents Copyright © 2012–2013, Texas Instruments Incorporated |
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