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TMS320C6742 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS320C6742 Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 187 page  Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TMS320C6742 SPRS587E – JUNE 2009 – REVISED MARCH 2014 TMS320C6742™ Fixed- and Floating-Point DSP 1 TMS320C6742 Fixed- and Floating-Point DSP 1.1 Features 1 – 2 SP x SP → SP Per Clock • 200-MHz C674x Fixed- and Floating-Point VLIW DSP – 2 SP x SP → DP Every Two Clocks • C674x Instruction Set Features – 2 SP x DP → DP Every Three Clocks – Superset of the C67x+ and C64x+ ISAs – 2 DP x DP → DP Every Four Clocks – Up to 1600 MIPS and 1200 MFLOPS • Fixed-Point Multiply Supports Two 32 x 32- Bit Multiplies, Four 16 x 16-Bit Multiplies, or – Byte-Addressable (8-, 16-, 32-, and 64-Bit Data) Eight 8 x 8-Bit Multiplies per Clock Cycle, – 8-Bit Overflow Protection and Complex Multiples – Bit-Field Extract, Set, Clear – Instruction Packing Reduces Code Size – Normalization, Saturation, Bit-Counting – All Instructions Conditional – Compact 16-Bit Instructions – Hardware Support for Modulo Loop Operation • C674x Two-Level Cache Memory Architecture – Protected Mode Operation – 32KB of L1P Program RAM/Cache – Exceptions Support for Error Detection and – 32KB of L1D Data RAM/Cache Program Redirection – 64KB of L2 Unified Mapped RAM/Cache • Software Support – Flexible RAM/Cache Partition (L1 and L2) – TI DSP BIOS™ • Enhanced Direct Memory Access Controller 3 – Chip Support Library and DSP Library (EDMA3): • 1.8-V or 3.3-V LVCMOS I/Os (Except for DDR2 – 2 Channel Controllers Interfaces) – 3 Transfer Controllers • Two External Memory Interfaces: – 64 Independent DMA Channels – EMIFA – 16 Quick DMA Channels • NOR (8- or 16-Bit-Wide Data) – Programmable Transfer Burst Size • NAND (8- or 16-Bit-Wide Data) • TMS320C674x Floating-Point VLIW DSP Core • 16-Bit SDRAM with 128-MB Address Space – Load-Store Architecture with Nonaligned – DDR2/Mobile DDR Memory Controller with one Support of the following: – 64 General-Purpose Registers (32-Bit) • 16-Bit DDR2 SDRAM with 256-MB Address – Six ALU (32- and 40-Bit) Functional Units Space • Supports 32-Bit Integer, SP (IEEE Single • 16-Bit mDDR SDRAM with 256-MB Address Precision/32-Bit) and DP (IEEE Double Space Precision/64-Bit) Floating Point • One Configurable 16550-Type UART Module: • Supports up to Four SP Additions Per Clock, – With Modem Control Signals Four DP Additions Every Two Clocks – 16-Byte FIFO • Supports up to Two Floating-Point (SP or – 16x or 13x Oversampling Option DP) Reciprocal Approximation (RCPxP) and • One Serial Peripheral Interface (SPI) with Multiple Square-Root Reciprocal Approximation Chip Selects (RSQRxP) Operations Per Cycle • Two Master and Slave Inter-Integrated Circuits – Two Multiply Functional Units: ( I2C Bus™) • Mixed-Precision IEEE Floating-Point Multiply • One Host-Port Interface (HPI) with 16-Bit-Wide Supported up to: Muxed Address and Data Bus For High Bandwidth 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
Similar Part No. - TMS320C6742_15 |
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Similar Description - TMS320C6742_15 |
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