ISL6625A

2

FN7978.0

September 19, 2012

Pin Configuration

ISL6625A

(8 LD 2x2 DFN)

TOP VIEW

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

TEMP. RANGE

(°C)

PACKAGE

(Pb-Free)

PKG.

DWG. #

ISL6625ACRZ-T

5AZ

0 to +70

8 Ld 2x2 DFN

L8.2x2D

ISL6625AIRZ-T

25A

-40 to +85

8 Ld 2x2 DFN

L8.2x2D

NOTES:

1. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6625A. For more information on MSL please see tech brief

TB363

1

UGATE

BOOT

PWM

PHASE

VCC

VCC

2

3

4

GND

8

7

6

5

LGATE

GND

Functional Pin Descriptions

PIN #

PIN

SYMBOL

FUNCTION

1

UGATE

Upper gate drive output. Connect to gate of high-side

power N-Channel MOSFET.

2

BOOT

Floating bootstrap supply pin for the upper gate drive.

Connect the bootstrap capacitor between this pin

and the PHASE pin. The bootstrap capacitor provides

the charge to turn on the upper MOSFET. See

“Internal Bootstrap Device” on page 6 for guidance in

choosing the capacitor value.

3

PWM

The PWM signal is the control input for the driver. The

PWM signal can enter three distinct states during

operation, see the three-state PWM Input section for

further details. Connect this pin to the PWM output of

the controller.

4

GND

Bias and reference ground. All signals are referenced

to this node. It is also the power ground return of the

driver.

5

LGATE

Lower gate drive output. Connect to gate of the

low-side power N-Channel MOSFET.

6,7

VCC

These two pins must tie to each other. Connect them

to 12V bias supply. Place a high quality low ESR

ceramic capacitor from this pin to GND.

8

PHASE

Connect this pin to the SOURCE of the upper MOSFET

and the DRAIN of the lower MOSFET. This pin provides

a return path for the upper gate drive.

-

PAD

Connect this pad to the power ground plane (GND) via

thermally enhanced connection.