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NX3L4053 Datasheet(PDF) 3 Page - NXP Semiconductors |
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NX3L4053 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 22 page NX3L4053 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 — 25 June 2012 3 of 22 NXP Semiconductors NX3L4053 Triple low-ohmic single-pole double-throw analog switch 6. Functional diagram 7. Pinning information 7.1 Pinning Pin numbers are shown for TSSOP16 package only. Pin numbers are shown for TSSOP16 package only. Fig 1. Logic symbol Fig 2. Logic diagram 001aal735 11 1S 1Y0 12 10 2S 1Y1 13 93S 1Z 14 2Y0 2 2Y1 1 2Z 15 3Y0 5 3Y1 3 6 E 3Z 4 001aal736 DECODER LOGIC 1Y1 13 1Y0 12 1Z 14 1S 11 16 VCC 8 GND 2S 10 3S 9 E 6 2Y1 1 2Y0 2 2Z 15 3Y1 3 3Y0 5 3Z 4 Fig 3. Pin configuration SOT1039-2 (HXQFN16) Fig 4. Pin configuration SOT403-1 (TSSOP16) 1 2 3 4 3Y1 3Z 3Y0 NX3L4053 E 12 11 10 9 1Z 1Y1 1Y0 1S 001aal737 Transparent top view terminal 1 index area NX3L4053 2Y1 VCC 2Y0 2Z 3Y1 1Z 3Z 1Y1 3Y0 1Y0 E1S n.c. 2S GND 3S 001aal738 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 |
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